From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932716Ab3CHTyW (ORCPT ); Fri, 8 Mar 2013 14:54:22 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:30630 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752146Ab3CHTyU (ORCPT ); Fri, 8 Mar 2013 14:54:20 -0500 Date: Fri, 8 Mar 2013 14:53:42 -0500 From: Konrad Rzeszutek Wilk To: Yinghai Lu Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Bjorn Helgaas , "Rafael J. Wysocki" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel , Sebastian Andrzej Siewior Subject: Re: [PATCH v2 13/26] x86, irq: Move down arch_early_irq_init() Message-ID: <20130308195342.GF6622@phenom.dumpdata.com> References: <1360351703-20571-1-git-send-email-yinghai@kernel.org> <1360351703-20571-14-git-send-email-yinghai@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1360351703-20571-14-git-send-email-yinghai@kernel.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-Source-IP: acsinet21.oracle.com [141.146.126.237] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 08, 2013 at 11:28:10AM -0800, Yinghai Lu wrote: > Change position only. > > Prepare to update arch_early_irq_init(), it needs call some static functions. ^^-> to > > Signed-off-by: Yinghai Lu > Cc: Joerg Roedel > Cc: Konrad Rzeszutek Wilk > Cc: Sebastian Andrzej Siewior > --- > arch/x86/kernel/apic/io_apic.c | 89 ++++++++++++++++++++-------------------- > 1 file changed, 44 insertions(+), 45 deletions(-) > > diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c > index 72a1351..deda981 100644 > --- a/arch/x86/kernel/apic/io_apic.c > +++ b/arch/x86/kernel/apic/io_apic.c > @@ -185,51 +185,6 @@ static struct irq_pin_list *alloc_irq_pin_list(int node) > return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node); > } > > - > -/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ > -static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY]; > - > -int __init arch_early_irq_init(void) > -{ > - struct irq_cfg *cfg; > - int count, node, i; > - > - if (!legacy_pic->nr_legacy_irqs) > - io_apic_irqs = ~0UL; > - > - for (i = 0; i < nr_ioapics; i++) { > - ioapics[i].saved_registers = > - kzalloc(sizeof(struct IO_APIC_route_entry) * > - ioapics[i].nr_registers, GFP_KERNEL); > - if (!ioapics[i].saved_registers) > - pr_err("IOAPIC %d: suspend/resume impossible!\n", i); > - } > - > - cfg = irq_cfgx; > - count = ARRAY_SIZE(irq_cfgx); > - node = cpu_to_node(0); > - > - /* Make sure the legacy interrupts are marked in the bitmap */ > - irq_reserve_irqs(0, legacy_pic->nr_legacy_irqs); > - > - for (i = 0; i < count; i++) { > - INIT_LIST_HEAD(&cfg[i].irq_2_pin); > - irq_set_chip_data(i, &cfg[i]); > - zalloc_cpumask_var_node(&cfg[i].domain, GFP_KERNEL, node); > - zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_KERNEL, node); > - /* > - * For legacy IRQ's, start with assigning irq0 to irq15 to > - * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. > - */ > - if (i < legacy_pic->nr_legacy_irqs) { > - cfg[i].vector = IRQ0_VECTOR + i; > - cpumask_setall(cfg[i].domain); > - } > - } > - > - return 0; > -} > - > static struct irq_cfg *irq_cfg(unsigned int irq) > { > return irq_get_chip_data(irq); > @@ -332,6 +287,50 @@ static struct irq_cfg *realloc_irq_and_cfg_at(unsigned int at, int node) > return alloc_irq_and_cfg_at(at, node); > } > > +/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ > +static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY]; > + > +int __init arch_early_irq_init(void) > +{ > + struct irq_cfg *cfg; > + int count, node, i; > + > + if (!legacy_pic->nr_legacy_irqs) > + io_apic_irqs = ~0UL; > + > + for (i = 0; i < nr_ioapics; i++) { > + ioapics[i].saved_registers = > + kzalloc(sizeof(struct IO_APIC_route_entry) * > + ioapics[i].nr_registers, GFP_KERNEL); > + if (!ioapics[i].saved_registers) > + pr_err("IOAPIC %d: suspend/resume impossible!\n", i); > + } > + > + cfg = irq_cfgx; > + count = ARRAY_SIZE(irq_cfgx); > + node = cpu_to_node(0); > + > + /* Make sure the legacy interrupts are marked in the bitmap */ > + irq_reserve_irqs(0, legacy_pic->nr_legacy_irqs); > + > + for (i = 0; i < count; i++) { > + INIT_LIST_HEAD(&cfg[i].irq_2_pin); > + irq_set_chip_data(i, &cfg[i]); > + zalloc_cpumask_var_node(&cfg[i].domain, GFP_KERNEL, node); > + zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_KERNEL, node); > + /* > + * For legacy IRQ's, start with assigning irq0 to irq15 to > + * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. > + */ > + if (i < legacy_pic->nr_legacy_irqs) { > + cfg[i].vector = IRQ0_VECTOR + i; > + cpumask_setall(cfg[i].domain); > + } > + } > + > + return 0; > +} > + > struct io_apic { > unsigned int index; > unsigned int unused[3]; > -- > 1.7.10.4 >