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From: Daniel Vetter <daniel@ffwll.ch>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: Ben Skeggs <bskeggs@redhat.com>,
	nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	gnurou@gmail.com, Eric Brower <ebrower@nvidia.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	Terje Bergstrom <tbergstrom@nvidia.com>,
	Ken Adams <KAdams@nvidia.com>
Subject: Re: [RFC 12/16] drm/nouveau/fifo: add GK20A support
Date: Tue, 4 Feb 2014 10:15:18 +0100	[thread overview]
Message-ID: <20140204091518.GZ17001@phenom.ffwll.local> (raw)
In-Reply-To: <1391224618-3794-13-git-send-email-acourbot@nvidia.com>

On Sat, Feb 01, 2014 at 12:16:54PM +0900, Alexandre Courbot wrote:
> GK20A's FIFO is compatible with NVE0, but only features 128 channels and
> 1 runlist.
> 
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  drivers/gpu/drm/nouveau/Makefile                   |  1 +
>  drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h    |  1 +
>  drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c    | 27 ++++++++++++++++++++++
>  drivers/gpu/drm/nouveau/core/include/engine/fifo.h |  1 +
>  4 files changed, 30 insertions(+)
>  create mode 100644 drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c
> 
> diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
> index e88145b..6c4b76d 100644
> --- a/drivers/gpu/drm/nouveau/Makefile
> +++ b/drivers/gpu/drm/nouveau/Makefile
> @@ -236,6 +236,7 @@ nouveau-y += core/engine/fifo/nv50.o
>  nouveau-y += core/engine/fifo/nv84.o
>  nouveau-y += core/engine/fifo/nvc0.o
>  nouveau-y += core/engine/fifo/nve0.o
> +nouveau-y += core/engine/fifo/nvea.o
>  nouveau-y += core/engine/fifo/nv108.o
>  nouveau-y += core/engine/graph/ctxnv40.o
>  nouveau-y += core/engine/graph/ctxnv50.o
> diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h
> index 014344e..e96b32b 100644
> --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h
> +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h
> @@ -8,6 +8,7 @@ int  nve0_fifo_ctor(struct nouveau_object *, struct nouveau_object *,
>  		    struct nouveau_object **);
>  void nve0_fifo_dtor(struct nouveau_object *);
>  int  nve0_fifo_init(struct nouveau_object *);
> +int  nve0_fifo_fini(struct nouveau_object *, bool);
>  
>  struct nve0_fifo_impl {
>  	struct nouveau_oclass base;
> diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c
> new file mode 100644
> index 0000000..16f8905
> --- /dev/null
> +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.

Just stumbled over this lincense header: Generally drm is mit/gpl dual
lincensed. The important part for me is the drm core, but due to all the
refactoring we tend to do and code extraction from drivers those are
rather relevant imo, too. Was this just an oversight or are you still
working with your legap people on this?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-02-04  9:15 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-01  3:16 [RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1) Alexandre Courbot
2014-02-01  3:16 ` [RFC 01/16] drm/nouveau: handle -EACCES runtime PM return code Alexandre Courbot
2014-02-01  3:16 ` [RFC 02/16] drm/nouveau: basic support for platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 03/16] drm/nouveau: add platform device probing function Alexandre Courbot
2014-02-01  3:16 ` [RFC 04/16] drm/nouveau/fifo: support platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 05/16] drm/nouveau/bar: " Alexandre Courbot
2014-02-01  3:16 ` [RFC 06/16] drm/nouveau/bar: only ioremap BAR3 if it exists Alexandre Courbot
2014-02-01  3:16 ` [RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3 Alexandre Courbot
2014-02-04  3:54   ` Ben Skeggs
2014-02-04  8:31     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 08/16] drm/nouveau/mc: support platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 09/16] drm/nouveau/fb: " Alexandre Courbot
2014-02-01  3:16 ` [RFC 10/16] drm/nouveau/timer: skip calibration on GK20A Alexandre Courbot
2014-02-04  3:55   ` Ben Skeggs
2014-02-04  8:39     ` Alexandre Courbot
2014-02-05 20:27       ` Stephen Warren
2014-02-01  3:16 ` [RFC 11/16] drm/nouveau/fifo: allocate usermem as needed Alexandre Courbot
2014-02-01  3:16 ` [RFC 12/16] drm/nouveau/fifo: add GK20A support Alexandre Courbot
2014-02-04  9:15   ` Daniel Vetter [this message]
2014-02-05  1:21     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 13/16] drm/nouveau/ibus: " Alexandre Courbot
2014-02-02  6:35   ` Ilia Mirkin
2014-02-02  9:38     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 14/16] drm/nouveau/fb: " Alexandre Courbot
2014-02-01 13:40   ` Lucas Stach
2014-02-01 23:28     ` Ilia Mirkin
2014-02-01 23:58       ` Lucas Stach
2014-02-02 13:43         ` Alexandre Courbot
2014-02-07 14:19           ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 15/16] drm/nouveau: support GK20A in nouveau_accel_init() Alexandre Courbot
2014-02-01  3:16 ` [RFC 16/16] drm/nouveau: support for probing GK20A Alexandre Courbot
2014-02-02 19:10 ` [RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1) Ilia Mirkin
2014-02-03  2:44   ` Alexandre Courbot
2014-02-03  3:14     ` Ilia Mirkin
2014-02-03  3:41       ` Ben Skeggs
2014-02-03 11:25 ` David Herrmann
2014-02-04  2:47   ` Alexandre Courbot
2014-02-03 17:33 ` Daniel Vetter
2014-02-04  3:53 ` Ben Skeggs
2014-02-04  8:44   ` Alexandre Courbot

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