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From: Andi Kleen <ak@linux.intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	"mingo@elte.hu" <mingo@elte.hu>, Joe Mario <jmario@redhat.com>,
	Don Zickus <dzickus@redhat.com>, Jiri Olsa <jolsa@redhat.com>,
	Arnaldo Carvalho de Melo <acme@redhat.com>
Subject: Re: [PATCH 1/2] perf/x86: update Haswell PEBS event constraints
Date: Thu, 19 Jun 2014 13:40:41 -0700	[thread overview]
Message-ID: <20140619204041.GW8178@tassilo.jf.intel.com> (raw)
In-Reply-To: <CABPqkBRy=u6oyyFV9yC9uOykHbNUdDqDgeQ3XSTpcAfQAyS-+g@mail.gmail.com>

On Thu, Jun 19, 2014 at 10:31:29PM +0200, Stephane Eranian wrote:
> On Thu, Jun 19, 2014 at 10:18 PM, Andi Kleen <ak@linux.intel.com> wrote:
> >> I don't quite understand that.
> >> You need to know which events support PEBS. You need a table
> >
> > We're talking about the kernel allowing things here.
> > Yes the user still needs to know what supports PEBS, but
> > that doesn't concern the kernel.
> >
> Just need to make sure you don't return bogus information.

GIGO. We only need to prevent security issues.

> > You can just allow it for all, it's a nop if the event doesn't
> > support it. And also the fields like DataLA are simply 0 when
> > not supported.
> >
> 
> Let's take a example. If I do resource_stalls:pp, the kernel
> will let it go through and clear the PMI bit on the config as
> is required for PEBS mode. The counter will count normally
> and never fire an interrupt, even when it overflows. It would
> never execute the PMI handler and thus never look at the
> PEBS content. You'd never get any samples.

Yes if the user specifies a bogus raw event it will not count.
That's fine. The important part is just that nothing ever crashes.

-Andi

  reply	other threads:[~2014-06-19 20:41 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-19 15:58 [PATCH 0/2] perf/x86: improve Intel load latency and precise store event constraints Stephane Eranian
2014-06-19 15:58 ` [PATCH 1/2] perf/x86: update Haswell PEBS " Stephane Eranian
2014-06-19 18:00   ` Andi Kleen
2014-06-19 19:53     ` Stephane Eranian
2014-06-19 20:18       ` Andi Kleen
2014-06-19 20:31         ` Stephane Eranian
2014-06-19 20:40           ` Andi Kleen [this message]
2014-06-19 20:45             ` Stephane Eranian
2014-06-20 13:44               ` Stephane Eranian
2014-06-23  7:35             ` Peter Zijlstra
2014-06-23 14:16               ` Andi Kleen
2014-06-23  7:14     ` Peter Zijlstra
2014-06-23  8:06       ` Stephane Eranian
2014-06-23 11:37         ` Peter Zijlstra
2014-06-23 11:51           ` Stephane Eranian
2014-06-23 15:47           ` Andi Kleen
2014-06-23  7:12   ` Peter Zijlstra
2014-06-19 15:58 ` [PATCH 2/2] perf/x86: fix constraints for load latency and precise events Stephane Eranian
2014-06-19 20:56   ` Andi Kleen
2014-06-23  8:42   ` Peter Zijlstra
2014-06-23  9:00     ` Stephane Eranian
2014-06-23 11:39       ` Peter Zijlstra
2014-06-23 14:22       ` Andi Kleen

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