From: Mark Rutland <mark.rutland@arm.com>
To: Andrew Bresticker <abrestic@chromium.org>
Cc: Ralf Baechle <ralf@linux-mips.org>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <Pawel.Moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Jeffrey Deans <jeffrey.deans@imgtec.com>,
Markos Chandras <markos.chandras@imgtec.com>,
Paul Burton <paul.burton@imgtec.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 03/12] of: Add binding document for MIPS GIC
Date: Mon, 1 Sep 2014 12:01:19 +0100 [thread overview]
Message-ID: <20140901110119.GB6617@leverpostej> (raw)
In-Reply-To: <1409350479-19108-4-git-send-email-abrestic@chromium.org>
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
> The Global Interrupt Controller (GIC) present on certain MIPS systems
> can be used to route external interrupts to individual VPEs and CPU
> interrupt vectors. It also supports a timer and software-generated
> interrupts.
>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Documentation/devicetree/bindings/mips/gic.txt | 50 ++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mips/gic.txt
>
> diff --git a/Documentation/devicetree/bindings/mips/gic.txt b/Documentation/devicetree/bindings/mips/gic.txt
> new file mode 100644
> index 0000000..725f1ef
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/gic.txt
> @@ -0,0 +1,50 @@
> +MIPS Global Interrupt Controller (GIC)
> +
> +The MIPS GIC routes external interrupts to individual VPEs and IRQ pins.
> +It also supports a timer and software-generated interrupts which can be
> +used as IPIs.
> +
> +Required properties:
> +- compatible : Should be "mti,global-interrupt-controller"
I couldn't find "mti" in vendor-prefixes.txt (as of v3.17-rc3). If
there's not a patch to add it elsewhere, would you mind providing one
with this series?
> +- reg : Base address and length of the GIC registers.
> +- interrupts : Core interrupts to which the GIC may route external interrupts.
How many? in any order?
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt specifier. Should be 3.
> + - The first cell is the GIC interrupt number.
> + - The second cell encodes the interrupt flags.
> + See <include/dt-bindings/interrupt-controller/irq.h> for a list of valid
> + flags.
Are all the flags valid for this interrupt controller?
> + - The optional third cell indicates which CPU interrupt vector the GIC
> + interrupt should be routed to. It is a 0-based index into the list of
> + GIC-to-CPU interrupts specified in the "interrupts" property described
> + above. For example, a '2' in this cell will route the interrupt to the
> + 3rd core interrupt listed in 'interrupts'. If omitted, the interrupt will
> + be routed to the 1st core interrupt.
I don't follow why this should be in the DT. Why is this necessary?
I also don't follow how this can be ommitted, given interrupt-cells is
required to be three by the wording above.
> +
> +Example:
> +
> + cpu_intc: interrupt-controller@0 {
Nit: there's no reg on this node, so there shouldn't be a unit-address.
Thanks,
Mark.
> + compatible = "mti,cpu-interrupt-controller";
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + gic: interrupt-controller@1bdc0000 {
> + compatible = "mti,global-interrupt-controller";
> + reg = <0x1bdc0000 0x20000>;
> +
> + interrupt-controller;
> + #interrupt-cells = <3>;
> +
> + interrupt-parent = <&cpu_intc>;
> + interrupts = <3>, <4>;
> + };
> +
> + uart@18101400 {
> + ...
> + interrupt-parent = <&gic>;
> + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 0>;
> + ...
> + };
> --
> 2.1.0.rc2.206.gedb03e5
>
> --
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next prev parent reply other threads:[~2014-09-01 11:01 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-29 22:14 [PATCH 00/12] MIPS: GIC device-tree support Andrew Bresticker
2014-08-29 22:14 ` [PATCH 01/12] MIPS: Provide a generic plat_irq_dispatch Andrew Bresticker
2014-08-31 17:34 ` Jonas Gorski
2014-08-29 22:14 ` [PATCH 02/12] MIPS: Set vint handler when mapping CPU interrupts Andrew Bresticker
2014-08-29 22:14 ` [PATCH 03/12] of: Add binding document for MIPS GIC Andrew Bresticker
2014-08-30 7:53 ` Arnd Bergmann
2014-08-31 18:34 ` Andrew Bresticker
2014-09-01 11:01 ` Mark Rutland [this message]
2014-09-01 12:11 ` James Hogan
2014-09-02 0:53 ` Andrew Bresticker
2014-09-02 9:33 ` Mark Rutland
2014-09-02 16:36 ` Andrew Bresticker
2014-09-02 17:27 ` David Daney
2014-09-02 19:36 ` Andrew Bresticker
2014-09-03 0:50 ` David Daney
2014-09-03 23:53 ` Andrew Bresticker
2014-09-04 0:06 ` David Daney
2014-08-29 22:14 ` [PATCH 04/12] MIPS: GIC: Move MIPS_GIC_IRQ_BASE into platform irq.h Andrew Bresticker
2014-08-30 7:57 ` Arnd Bergmann
2014-08-31 18:54 ` Andrew Bresticker
2014-09-01 8:34 ` Arnd Bergmann
2014-09-02 0:08 ` Andrew Bresticker
2014-09-02 22:22 ` Andrew Bresticker
2014-09-03 15:08 ` Arnd Bergmann
2014-08-29 22:14 ` [PATCH 05/12] MIPS: GIC: Add device-tree support Andrew Bresticker
2014-08-30 7:54 ` Arnd Bergmann
2014-08-31 18:42 ` Andrew Bresticker
2014-08-29 22:14 ` [PATCH 06/12] MIPS: GIC: Add generic IPI support when using DT Andrew Bresticker
2014-08-29 22:14 ` [PATCH 07/12] MIPS: GIC: Implement irq_set_type callback Andrew Bresticker
2014-08-29 22:14 ` [PATCH 08/12] MIPS: GIC: Implement generic irq_ack/irq_eoi callbacks Andrew Bresticker
2014-08-29 22:14 ` [PATCH 09/12] MIPS: GIC: Fix gic_set_affinity() return value Andrew Bresticker
2014-08-29 22:14 ` [PATCH 10/12] MIPS: GIC: Support local interrupts Andrew Bresticker
2014-08-29 22:14 ` [PATCH 11/12] MIPS: GIC: Use local interrupts for timer Andrew Bresticker
2014-08-29 22:14 ` [PATCH 12/12] MIPS: Malta: Map GIC local interrupts Andrew Bresticker
2014-08-30 6:33 ` [PATCH 00/12] MIPS: GIC device-tree support John Crispin
2014-08-31 18:32 ` Andrew Bresticker
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