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From: Bjorn Helgaas <bhelgaas@google.com>
To: Huang Rui <ray.huang@amd.com>
Cc: Felipe Balbi <balbi@ti.com>,
	Alan Stern <stern@rowland.harvard.edu>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Paul Zimmerman <Paul.Zimmerman@synopsys.com>,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	Vincent Wan <vincent.wan@amd.com>, Tony Li <tony.li@amd.com>,
	linux-usb@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 02/16] pci: quirks: add quirk to avoid AMD NL to bind with xhci
Date: Fri, 24 Oct 2014 10:35:29 -0600	[thread overview]
Message-ID: <20141024163529.GA7075@google.com> (raw)
In-Reply-To: <1413536021-4886-3-git-send-email-ray.huang@amd.com>

On Fri, Oct 17, 2014 at 04:53:27PM +0800, Huang Rui wrote:
> The dwc3 controller is the PCI-E device in AMD NL platform, but the class code
> of PCI header is 0x0c0330, the same with xHC. That's because it needs to meet
> the windows enviroment. The dwc3 controller acted as only host mode to bind with
> windows xhci driver.
> But on linux, sometimes, it would auto-bind with xhci driver as well (class code
> 0x0c0330) despite it uses Pid/Vid on dwc3 driver.

This changelog really doesn't make any sense unless the reader already
knows everything.  I think you mean something like this:

  The AMD NL (please explain what "NL" is; Google has no clue) SoC contains
  a DesignWare USB3 Dual-Role Device that can be operated either as a USB
  Host or a USB Device.  In the AMD NL platform, this device ([1022:7912])
  has a class code of PCI_CLASS_SERIAL_USB_XHCI (0x0c0330), which means the
  xhci driver will claim it.

  But the dwc3 driver is a more specific driver for this device, and we'd
  prefer to use it instead of xhci.  To prevent xhci from claiming the
  device, change the class code to 0x0c03fe, which the PCI r3.0 spec
  defines as "USB device (not host controller)".  The dwc3 driver can then
  claim it based on its Vendor and Device ID.

Obviously, this means the device won't work at all unless dwc3 is enabled.
Previously, it probably would work as a host controller with the xhci
driver.  I assume this change is what you want.

> Heikki suggested to use the quirk to fix this issue, and the detailed discussion
> is at below thread:
> http://marc.info/?l=linux-usb&m=141197934712824&w=2

This changelog needs to be wrapped so no line is longer than 75 characters.

Please run "git log --oneline --no-merges drivers/pci/quirks.c" and make
your subject line match the rest.  In particular, "PCI" (not "pci"), drop
the "quirks:" part, and capitalize "Add".

> Suggested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  drivers/pci/quirks.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 90acb32..3c911b7 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -378,6 +378,26 @@ static void quirk_ati_exploding_mce(struct pci_dev *dev)
>  }
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI,	PCI_DEVICE_ID_ATI_RS100,   quirk_ati_exploding_mce);
>  
> +/* FIXME should define in <linux/pci_ids.h> */
> +#define PCI_DEVICE_ID_AMD_NL	0x7912

If you KNOW this should be in linux/pci_ids.h (and it looks like it COULD
go there, since you do use the same definition in patch [01/16]), why don't
you just do it?  Why are you wasting our time reviewing trivial stuff like
this?

> +
> +/*
> + * AMD NL SoC 7912 PCI device is dwc3 controller, but the class code of PCI
> + * header is 0x0c0330, the same with xHC. That's because it need to meet the
> + * windows enviroment. The dwc3 controller acted as only host mode to bind with
> + * windows xhci driver. But on linux, sometimes, we auto-bind with xhci driver
> + * as well (class code 0x0c0330) despite we use Pid/Vid on dwc3 driver. So this
> + * quirk used a dummy class code to avoid to bind with xhci driver at booting
> + * phase.
> + */
> +static void quirk_amd_nl_class(struct pci_dev *pdev)
> +{
> +	/* Use a dummy class value instead of PCI header provided */

When you say "dummy class value," that makes it sound like you just chose
a random invalid value.  But this value is actually defined by the spec, so
you should use the description from the spec, namely, "USB device (not host
controller)".

Bjorn

> +	pdev->class = 0x0c03fe;
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL,
> +		quirk_amd_nl_class);
> +
>  /*
>   * Let's make the southbridge information explicit instead
>   * of having to worry about people probing the ACPI areas,
> -- 
> 1.9.1
> 

  reply	other threads:[~2014-10-24 16:35 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-17  8:53 [PATCH v2 00/16] usb: dwc3: add support for AMD NL SoC Huang Rui
2014-10-17  8:53 ` [PATCH v2 01/16] usb: dwc3: add AMD NL support Huang Rui
2014-10-17 15:00   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 02/16] pci: quirks: add quirk to avoid AMD NL to bind with xhci Huang Rui
2014-10-24 16:35   ` Bjorn Helgaas [this message]
2014-10-27  2:55     ` Huang Rui
2014-10-27 13:21       ` Bjorn Helgaas
2014-10-17  8:53 ` [PATCH v2 03/16] usb: dwc3: enable hibernation if to be supported Huang Rui
2014-10-17  8:53 ` [PATCH v2 04/16] usb: dwc3: add a flag to check if it is fpga board Huang Rui
2014-10-17  8:53 ` [PATCH v2 05/16] usb: dwc3: add quirks support to be compatible for kinds of SoCs Huang Rui
2014-10-17 14:41   ` Felipe Balbi
2014-10-20  6:02     ` Huang Rui
2014-10-24 15:25       ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 06/16] usb: dwc3: add disscramble quirk Huang Rui
2014-10-17 14:45   ` Felipe Balbi
2014-10-20  6:38     ` Huang Rui
2014-10-24 15:26       ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 07/16] usb: dwc3: add lpm erratum support Huang Rui
2014-10-17 14:48   ` Felipe Balbi
2014-10-24 17:01     ` Huang Rui
2014-10-24 17:35       ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 08/16] usb: dwc3: add u2exit lfps quirk Huang Rui
2014-10-17 14:50   ` Felipe Balbi
2014-10-20  6:43     ` Huang Rui
2014-10-24 15:27       ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 09/16] usb: dwc3: add P3 in U2 SS inactive quirk Huang Rui
2014-10-17 14:52   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 10/16] usb: dwc3: add request p1p2p3 quirk Huang Rui
2014-10-17 14:53   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 11/16] usb: dwc3: add delay " Huang Rui
2014-10-17 14:54   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 12/16] usb: dwc3: add delay phy power change quirk Huang Rui
2014-10-17 14:56   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 13/16] usb: dwc3: add lfps filter quirk Huang Rui
2014-10-17 14:56   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 14/16] usb: dwc3: enable rx_detect to polling lfps quirk Huang Rui
2014-10-17 14:57   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 15/16] usb: dwc3: add tx demphasis quirk Huang Rui
2014-10-17 14:57   ` Felipe Balbi
2014-10-17  8:53 ` [PATCH v2 16/16] usb: dwc3: enable usb suspend phy Huang Rui
2014-10-17 14:59   ` Felipe Balbi
2014-10-17 18:41     ` Paul Zimmerman
2014-10-17 18:48       ` Felipe Balbi
2014-10-20  8:41         ` Huang Rui
2014-10-20  9:01           ` Huang Rui
2014-10-20 18:17             ` Paul Zimmerman
2014-10-24 15:29             ` Felipe Balbi
2014-10-24 15:28           ` Felipe Balbi
2014-10-17 15:10 ` [PATCH v2 00/16] usb: dwc3: add support for AMD NL SoC Felipe Balbi
2014-10-20 15:38   ` Huang Rui
2014-10-24 15:30     ` Felipe Balbi

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