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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Mike Turquette <mturquette@linaro.org>,
	Grant Likely <grant.likely@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Hans de Goede <hdegoede@redhat.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [PATCH 1/6] clk: sunxi: Add support for sun9i a80 usb clocks and resets
Date: Wed, 5 Nov 2014 11:09:12 +0100	[thread overview]
Message-ID: <20141105100912.GD27686@lukather> (raw)
In-Reply-To: <CAGb2v65VojZVEijdjXYGkMud7dMFzMzagfN=_4S3msZygu3YPQ@mail.gmail.com>

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On Wed, Nov 05, 2014 at 06:02:35PM +0800, Chen-Yu Tsai wrote:
> >> +static void __init sunxi_usb_clk_setup(struct device_node *node,
> >> +                                    const struct usb_clk_data *data,
> >> +                                    spinlock_t *lock)
> >> +{
> >> +     struct clk_onecell_data *clk_data;
> >> +     struct usb_reset_data *reset_data;
> >> +     const char *clk_parent;
> >> +     const char *clk_name;
> >> +     void __iomem *reg;
> >> +     int qty;
> >> +     int i = 0;
> >> +     int j = 0;
> >> +
> >> +     reg = of_iomap(node, 0);
> >
> > of_io_request_and_map?
> 
> OK. About that, any recommended naming style for the 3rd argument?
> Maybe the driver name "clk_sun9i_usb"? Or just a generic name like
> "usb_clk"?
> 
> I'm asking now as we'll likely be changing the existing drivers to
> use it as well.

I don't really have a preference. Maybe the DT node name would be both
the easier and better solution.

[...]

> >> +static void __init sun9i_a80_usb_mod_setup(struct device_node *node)
> >> +{
> >> +     /* AHB1 gate must be enabled to access registers */
> >> +     struct clk *ahb = of_clk_get(node, 0);
> >> +
> >> +     WARN_ON(IS_ERR(ahb));
> >> +     clk_prepare_enable(ahb);
> >
> > Hmmmm. That look off.
> >
> > Why do you need the clock to be enabled all the time? Isn't the CCF
> > already taking care of enabling the parent clock whenever it needs to
> > access any register?
> 
> There are also resets in the same block. That and I couldn't get it
> working without enabling the clock beforehand.

Ah, right.

What happens if you just enable and disable the clocks in the
reset_assert and reset_deassert right before and after accessing the
registers?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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  reply	other threads:[~2014-11-05 10:11 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-04  4:07 [PATCH 0/6] ARM: sun9i: Add USB host controller support for A80 Chen-Yu Tsai
2014-11-04  4:07 ` [PATCH 1/6] clk: sunxi: Add support for sun9i a80 usb clocks and resets Chen-Yu Tsai
2014-11-04 16:57   ` Maxime Ripard
2014-11-05 10:02     ` Chen-Yu Tsai
2014-11-05 10:09       ` Maxime Ripard [this message]
2014-11-06  2:09         ` Chen-Yu Tsai
2014-11-06  8:54           ` Maxime Ripard
2014-11-06  9:19             ` Chen-Yu Tsai
2014-11-14  8:39               ` Maxime Ripard
2014-11-14 19:58                 ` [linux-sunxi] " Chen-Yu Tsai
2014-11-04 18:12   ` Russell King - ARM Linux
2014-11-05  9:41     ` Maxime Ripard
2014-11-04  4:07 ` [PATCH 2/6] ARM: dts: sun9i: Add usb clock nodes to a80 dtsi Chen-Yu Tsai
2014-11-04  4:07 ` [PATCH 3/6] phy: Add driver to support individual USB PHYs on sun9i Chen-Yu Tsai
2014-11-04  6:16   ` [linux-sunxi] " Priit Laes
2014-11-05  9:35     ` Chen-Yu Tsai
2014-11-05  9:45     ` Maxime Ripard
     [not found]       ` <jwvr3xhu6p3.fsf-monnier+gmane.comp.hardware.netbook.arm.sunxi@gnu.org>
2014-11-05 13:40         ` [linux-sunxi] " Maxime Ripard
2014-11-04 17:03   ` Maxime Ripard
2014-11-05  9:31     ` Chen-Yu Tsai
2014-11-04  4:07 ` [PATCH 4/6] ARM: dts: sun9i: Add usb phy nodes to a80 dtsi Chen-Yu Tsai
2014-11-04  4:07 ` [PATCH 5/6] ARM: dts: sun9i: Add USB host controller " Chen-Yu Tsai
2014-11-04  4:07 ` [PATCH 6/6] ARM: dts: sun9i: Enable USB support on A80 Optimus board Chen-Yu Tsai

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