From: Wolfram Sang <wsa@the-dreams.de>
To: Andrew Jackson <Andrew.Jackson@arm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
Baruch Siach <baruch@tkos.co.il>,
"Du, Wenkai" <wenkai.du@intel.com>,
Shinya Kuribayashi <skuribay@pobox.com>,
Romain Baeriswyl <Romain.Baeriswyl@abilis.com>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
Liviu Dudau <Liviu.Dudau@arm.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] i2c: designware: prevent early stop on TX FIFO empty
Date: Fri, 21 Nov 2014 08:05:54 +0100 [thread overview]
Message-ID: <20141121070554.GF1480@katana> (raw)
In-Reply-To: <545CB6C4.8010201@arm.com>
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On Fri, Nov 07, 2014 at 12:10:44PM +0000, Andrew Jackson wrote:
> If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
> set to zero, allowing the TX FIFO to become empty causes a STOP
> condition to be generated on the I2C bus. If the transmit FIFO
> threshold is set too high, an erroneous STOP condition can be
> generated on long transfers - particularly where the interrupt
> latency is extended.
>
> Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Applied to for-current, thanks!
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prev parent reply other threads:[~2014-11-21 7:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-07 12:10 [PATCH] i2c: designware: prevent early stop on TX FIFO empty Andrew Jackson
2014-11-19 9:21 ` Wolfram Sang
2014-11-19 13:35 ` Baruch Siach
2014-11-19 14:18 ` Mika Westerberg
2014-11-21 7:05 ` Wolfram Sang [this message]
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