From: Will Deacon <will.deacon@arm.com>
To: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
"patches@linaro.org" <patches@linaro.org>,
"linaro-kernel@lists.linaro.org" <linaro-kernel@lists.linaro.org>,
John Stultz <john.stultz@linaro.org>,
Sumit Semwal <sumit.semwal@linaro.org>
Subject: Re: [PATCH v2 1/2] arm: perf: Prevent wraparound during overflow
Date: Thu, 4 Dec 2014 10:26:12 +0000 [thread overview]
Message-ID: <20141204102612.GB14519@arm.com> (raw)
In-Reply-To: <1416587067-3220-2-git-send-email-daniel.thompson@linaro.org>
On Fri, Nov 21, 2014 at 04:24:26PM +0000, Daniel Thompson wrote:
> If the overflow threshold for a counter is set above or near the
> 0xffffffff boundary then the kernel may lose track of the overflow
> causing only events that occur *after* the overflow to be recorded.
> Specifically the problem occurs when the value of the performance counter
> overtakes its original programmed value due to wrap around.
>
> Typical solutions to this problem are either to avoid programming in
> values likely to be overtaken or to treat the overflow bit as the 33rd
> bit of the counter.
>
> Its somewhat fiddly to refactor the code to correctly handle the 33rd bit
> during irqsave sections (context switches for example) so instead we take
> the simpler approach of avoiding values likely to be overtaken.
>
> We set the limit to half of max_period because this matches the limit
> imposed in __hw_perf_event_init(). This causes a doubling of the interrupt
> rate for large threshold values, however even with a very fast counter
> ticking at 4GHz the interrupt rate would only be ~1Hz.
>
> Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
You'll probably need to refresh this at -rc1 as there are a bunch of
changes queued for this file already. Then you can stick it into rmk's
patch system.
Cheers,
Will
> ---
> arch/arm/kernel/perf_event.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
> index 266cba46db3e..ab68833c1e31 100644
> --- a/arch/arm/kernel/perf_event.c
> +++ b/arch/arm/kernel/perf_event.c
> @@ -115,8 +115,14 @@ int armpmu_event_set_period(struct perf_event *event)
> ret = 1;
> }
>
> - if (left > (s64)armpmu->max_period)
> - left = armpmu->max_period;
> + /*
> + * Limit the maximum period to prevent the counter value
> + * from overtaking the one we are about to program. In
> + * effect we are reducing max_period to account for
> + * interrupt latency (and we are being very conservative).
> + */
> + if (left > (armpmu->max_period >> 1))
> + left = armpmu->max_period >> 1;
>
> local64_set(&hwc->prev_count, (u64)-left);
>
> --
> 1.9.3
>
>
next prev parent reply other threads:[~2014-12-04 10:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-19 15:52 [PATCH] arm: perf: Prevent wraparound during overflow Daniel Thompson
2014-11-19 18:11 ` Will Deacon
2014-11-20 12:14 ` Daniel Thompson
2014-11-21 16:24 ` [PATCH v2 0/2] arm+arm64: " Daniel Thompson
2014-11-21 16:24 ` [PATCH v2 1/2] arm: " Daniel Thompson
2014-12-04 10:26 ` Will Deacon [this message]
2014-12-04 13:58 ` Daniel Thompson
2015-01-05 14:57 ` Peter Zijlstra
2015-01-05 19:31 ` Daniel Thompson
2015-01-06 19:46 ` Will Deacon
2014-11-21 16:24 ` [PATCH v2 2/2] arm64: " Daniel Thompson
2014-12-04 10:27 ` Will Deacon
2014-12-22 9:39 ` [PATCH 3.19-rc1 v3] arm: " Daniel Thompson
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