From: Mark Rutland <mark.rutland@arm.com>
To: Wenyou Yang <wenyou.yang@atmel.com>
Cc: "nicolas.ferre@atmel.com" <nicolas.ferre@atmel.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"sylvain.rochet@finsecur.com" <sylvain.rochet@finsecur.com>,
"Patrice.VILCHEZ@atmel.com" <Patrice.VILCHEZ@atmel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"alexandre.belloni@free-electrons.com"
<alexandre.belloni@free-electrons.com>,
"peda@axentia.se" <peda@axentia.se>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/7] ARM: at91: enable the L2 Cache controller
Date: Mon, 26 Jan 2015 11:46:59 +0000 [thread overview]
Message-ID: <20150126114659.GD23313@leverpostej> (raw)
In-Reply-To: <1422266836-24592-1-git-send-email-wenyou.yang@atmel.com>
On Mon, Jan 26, 2015 at 10:07:16AM +0000, Wenyou Yang wrote:
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
> arch/arm/mach-at91/board-dt-sama5.c | 53 +++++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
> index 86cffcd..ed6db28 100644
> --- a/arch/arm/mach-at91/board-dt-sama5.c
> +++ b/arch/arm/mach-at91/board-dt-sama5.c
> @@ -17,17 +17,70 @@
> #include <linux/of_platform.h>
> #include <linux/phy.h>
> #include <linux/clk-provider.h>
> +#include <linux/of_address.h>
>
> #include <asm/setup.h>
> #include <asm/irq.h>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> #include <asm/mach/irq.h>
> +#include <asm/hardware/cache-l2x0.h>
>
> #include "generic.h"
>
> +void __iomem *at91_l2cc_base;
> +EXPORT_SYMBOL_GPL(at91_l2cc_base);
> +
> +#ifdef CONFIG_CACHE_L2X0
> +static void __init at91_init_l2cache(void)
> +{
> + struct device_node *np;
> + u32 reg;
> +
> + np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
> + if (!np)
> + return;
> +
> + at91_l2cc_base = of_iomap(np, 0);
> + if (!at91_l2cc_base)
> + panic("unable to map l2cc cpu registers\n");
> +
> + of_node_put(np);
> +
> + /* Disable cache if it hasn't been done yet */
> + if (readl_relaxed(at91_l2cc_base + L2X0_CTRL) & L2X0_CTRL_EN)
> + writel_relaxed(~L2X0_CTRL_EN, at91_l2cc_base + L2X0_CTRL);
> +
> + /* Prefetch Control */
> + reg = readl_relaxed(at91_l2cc_base + L310_PREFETCH_CTRL);
> + reg &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
> + reg |= 0x01;
> + reg |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
> + reg |= L310_PREFETCH_CTRL_PREFETCH_DROP;
> + reg |= L310_PREFETCH_CTRL_DATA_PREFETCH;
> + reg |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
> + reg |= L310_PREFETCH_CTRL_DBL_LINEFILL;
> + writel_relaxed(reg, at91_l2cc_base + L310_PREFETCH_CTRL);
> +
> + /* Power Control */
> + reg = readl_relaxed(at91_l2cc_base + L310_POWER_CTRL);
> + reg |= L310_STNDBY_MODE_EN;
> + reg |= L310_DYNAMIC_CLK_GATING_EN;
> + writel_relaxed(reg, at91_l2cc_base + L310_POWER_CTRL);
> +
> + /* Disable interrupts */
> + writel_relaxed(0x00, at91_l2cc_base + L2X0_INTR_MASK);
> + writel_relaxed(0x01ff, at91_l2cc_base + L2X0_INTR_CLEAR);
> + l2x0_of_init(0, ~0UL);
> +}
> +#else
> +static inline void at91_init_l2cache(void) {}
> +#endif
This poking of the PL310 should live in the cache_l2x0 driver.
Mark.
next prev parent reply other threads:[~2015-01-26 11:47 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-26 10:03 [PATCH 0/7] AT91 pm improvements for 3.20 Wenyou Yang
2015-01-26 10:04 ` [PATCH 1/7] pm: at91: achieve the memory controller's type from the dts file Wenyou Yang
2015-01-26 10:06 ` [PATCH 2/7] pm: at91: pm_suspend: add the WFI support for ARMv7 Wenyou Yang
2015-01-26 13:05 ` Sergei Shtylyov
2015-01-27 4:44 ` Yang, Wenyou
2015-01-28 11:25 ` Lorenzo Pieralisi
2015-01-29 2:36 ` Yang, Wenyou
2015-01-29 12:22 ` Lorenzo Pieralisi
2015-01-30 7:23 ` Yang, Wenyou
2015-01-30 10:17 ` Lorenzo Pieralisi
2015-01-30 10:44 ` Lorenzo Pieralisi
2015-01-26 10:06 ` [PATCH 3/7] pm: at91: pm_suspend: MOR register KEY was missing Wenyou Yang
2015-01-26 10:07 ` [PATCH 4/7] ARM: at91: enable the L2 Cache controller Wenyou Yang
2015-01-26 11:46 ` Mark Rutland [this message]
2015-01-26 12:45 ` Russell King - ARM Linux
2015-01-26 22:36 ` Alexandre Belloni
2015-01-27 5:11 ` Yang, Wenyou
2015-01-26 10:07 ` [PATCH 5/7] pm: at91: add disable/enable the L1/L2 cache while suspend/resume Wenyou Yang
2015-01-26 10:08 ` [PATCH 6/7] pm: at91: add achieve the mpddrc peripheral ID and the DDR clock ID support Wenyou Yang
2015-01-26 11:49 ` Mark Rutland
2015-01-27 5:24 ` Yang, Wenyou
2015-01-26 10:08 ` [PATCH 7/7] pm: at91: add disable/enable the mpddrc's clock and DDR clock support Wenyou Yang
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