From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933885AbbA2Dlp (ORCPT ); Wed, 28 Jan 2015 22:41:45 -0500 Received: from utopia.booyaka.com ([74.50.51.50]:59256 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754446AbbA2BjB (ORCPT ); Wed, 28 Jan 2015 20:39:01 -0500 MBOX-Line: From nobody Wed Jan 28 16:49:37 2015 Subject: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe From: Paul Walmsley Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Ian Campbell , linux-pci@vger.kernel.org, Stephen Warren , linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Thierry Reding , Kumar Gala , linux-tegra@vger.kernel.org Date: Wed, 28 Jan 2015 16:49:37 -0700 Message-ID: <20150128234937.20644.9400.stgit@dusk.lan> In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> User-Agent: StGit/0.16-37-g27ac3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible strings for the PCIe IP blocks present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley Cc: Thierry Reding Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Alexandre Courbot Cc: linux-tegra@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/pci/nvidia,tegra20-pcie.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt index d763e047c6ae..e772884f1c33 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt @@ -5,6 +5,8 @@ Required properties: - "nvidia,tegra20-pcie" - "nvidia,tegra30-pcie" - "nvidia,tegra124-pcie" + - "nvidia,tegra132-pcie" (not yet matched in the driver) + - "nvidia,tegra210-pcie" (not yet matched in the driver) - device_type: Must be "pci" - reg: A list of physical base address and length for each set of controller registers. Must contain an entry for each entry in the reg-names property.