From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757387AbbA2DcN (ORCPT ); Wed, 28 Jan 2015 22:32:13 -0500 Received: from utopia.booyaka.com ([74.50.51.50]:59439 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757396AbbA2Bof (ORCPT ); Wed, 28 Jan 2015 20:44:35 -0500 MBOX-Line: From nobody Wed Jan 28 16:49:38 2015 Subject: [PATCH 13/24] Documentation: DT bindings: add more chip compatible strings for Tegra PMC From: Paul Walmsley Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , linux-tegra@vger.kernel.org Date: Wed, 28 Jan 2015 16:49:38 -0700 Message-ID: <20150128234938.20644.51314.stgit@dusk.lan> In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> User-Agent: StGit/0.16-37-g27ac3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible strings for the PMC IP block present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot Cc: Paul Walmsley Cc: devicetree@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt index 68ac65f82a1c..84bb31e7b778 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt @@ -6,7 +6,11 @@ modes. It provides power-gating controllers for SoC and CPU power-islands. Required properties: - name : Should be pmc -- compatible : Should contain "nvidia,tegra-pmc". +- compatible : "nvidia,tegra20-pmc" + "nvidia,tegra30-pmc" + "nvidia,tegra114-pmc" + "nvidia,tegra124-pmc" + "nvidia,tegra132-pmc" (not yet matched by the driver) - reg : Offset and length of the register set for the device - clocks : Must contain an entry for each entry in clock-names. See ../clocks/clock-bindings.txt for details.