From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755842AbbCBRAA (ORCPT ); Mon, 2 Mar 2015 12:00:00 -0500 Received: from mail-we0-f178.google.com ([74.125.82.178]:36240 "EHLO mail-we0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754691AbbCBQ74 (ORCPT ); Mon, 2 Mar 2015 11:59:56 -0500 Date: Mon, 2 Mar 2015 16:59:47 +0000 From: Lee Jones To: Peter Griffin Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maxime.coquelin@st.com, patrice.chotard@st.com, srinivas.kandagatla@gmail.com, tj@kernel.org, linux-ide@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/3] ahci: st: Update the ahci_st DT documentation Message-ID: <20150302165947.GA6976@x1> References: <1425300519-13747-1-git-send-email-peter.griffin@linaro.org> <1425300519-13747-2-git-send-email-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1425300519-13747-2-git-send-email-peter.griffin@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 02 Mar 2015, Peter Griffin wrote: > As part of testing ahci_st driver working on stih407 I noticed > several things wrong in the DT documentation: - > > 1) Compatible string doesn't match the driver code > 2) pwr-rst reset isn't documented (but exists in the driver) > 3) some whitespace issues (spaces not tabs) > > Also add in a stih407 family example into the doc. > > Signed-off-by: Peter Griffin > --- > Documentation/devicetree/bindings/ata/ahci-st.txt | 45 ++++++++++++++++------- > 1 file changed, 32 insertions(+), 13 deletions(-) Acked-by: Lee Jones > diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt > index 1331202..e1d01df 100644 > --- a/Documentation/devicetree/bindings/ata/ahci-st.txt > +++ b/Documentation/devicetree/bindings/ata/ahci-st.txt > @@ -3,29 +3,48 @@ STMicroelectronics STi SATA controller > This binding describes a SATA device. > > Required properties: > - - compatible : Must be "st,sti-ahci" > + - compatible : Must be "st,ahci" > - reg : Physical base addresses and length of register sets > - interrupts : Interrupt associated with the SATA device > - interrupt-names : Associated name must be; "hostc" > - - resets : The power-down and soft-reset lines of SATA IP > - - reset-names : Associated names must be; "pwr-dwn" and "sw-rst" > - clocks : The phandle for the clock > - clock-names : Associated name must be; "ahci_clk" > - phys : The phandle for the PHY port > - phy-names : Associated name must be; "ahci_phy" > > +Optional properties: > + - resets : The power-down, soft-reset and power-reset lines of SATA IP > + - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst" > + > Example: > > + /* Example for stih416 */ > sata0: sata@fe380000 { > - compatible = "st,sti-ahci"; > - reg = <0xfe380000 0x1000>; > - interrupts = ; > - interrupt-names = "hostc"; > - phys = <&phy_port0 PHY_TYPE_SATA>; > - phy-names = "ahci_phy"; > - resets = <&powerdown STIH416_SATA0_POWERDOWN>, > + compatible = "st,ahci"; > + reg = <0xfe380000 0x1000>; > + interrupts = ; > + interrupt-names = "hostc"; > + phys = <&phy_port0 PHY_TYPE_SATA>; > + phy-names = "ahci_phy"; > + resets = <&powerdown STIH416_SATA0_POWERDOWN>, > <&softreset STIH416_SATA0_SOFTRESET>; > - reset-names = "pwr-dwn", "sw-rst"; > - clocks = <&clk_s_a0_ls CLK_ICN_REG>; > - clock-names = "ahci_clk"; > + reset-names = "pwr-dwn", "sw-rst"; > + clocks = <&clk_s_a0_ls CLK_ICN_REG>; > + clock-names = "ahci_clk"; > + }; > + > + /* Example for stih407 family silicon */ > + sata0: sata@9b20000 { > + compatible = "st,ahci"; > + reg = <0x9b20000 0x1000>; > + interrupts = ; > + interrupt-names = "hostc"; > + phys = <&phy_port0 PHY_TYPE_SATA>; > + phy-names = "ahci_phy"; > + resets = <&powerdown STIH407_SATA0_POWERDOWN>, > + <&softreset STIH407_SATA0_SOFTRESET>, > + <&softreset STIH407_SATA0_PWR_SOFTRESET>; > + reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; > + clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; > + clock-names = "ahci_clk"; > }; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog