From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934298AbbDVIMj (ORCPT ); Wed, 22 Apr 2015 04:12:39 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:42221 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934219AbbDVIM1 (ORCPT ); Wed, 22 Apr 2015 04:12:27 -0400 X-AuditID: cbfee61b-f79536d000000f1f-27-553757e91e8b Date: Wed, 22 Apr 2015 10:12:08 +0200 From: Lukasz Majewski To: Bartlomiej Zolnierkiewicz Cc: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar , Doug Anderson , Kevin Hilman , Heiko Stuebner , linux-pm@vger.kernel.org, Sachin Kamat , Tomasz Figa , linux-kernel@vger.kernel.org, Chanwoo Choi , linux-samsung-soc@vger.kernel.org, Andreas Faerber , Javier Martinez Canillas , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 4/8] ARM: dts: Exynos5420: add CPU OPP and regulator supply property Message-id: <20150422101208.7f03ff3b@amdc2363> In-reply-to: <1429622278-12216-5-git-send-email-b.zolnierkie@samsung.com> References: <1429622278-12216-1-git-send-email-b.zolnierkie@samsung.com> <1429622278-12216-5-git-send-email-b.zolnierkie@samsung.com> Organization: SPRC Poland X-Mailer: Claws Mail 3.8.1 (GTK+ 2.24.10; x86_64-pc-linux-gnu) MIME-version: 1.0 Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOIsWRmVeSWpSXmKPExsVy+t9jQd2X4eahBodn6Vg0byq22DhjPavF 9S/PWS3OLjvIZvH/0WtWi6O/Cyx6F1xls+h//JrZ4uvhFYwWmx5fY7W4vGsOm8Xn3iOMFjPO 72OyeDrhIpvF4TftrBYn//QyWnQsY7RYtesPo8XGrx4Owh6zGy6yePx9fp3FY+esu+wem1Z1 snncubaHzWPzknqPvi2rGD22X5vH7LH5dLXH501yAVxRXDYpqTmZZalF+nYJXBk/Z/9jL3gm XfFpu20D42WRLkZODgkBE4l9X+eyQ9hiEhfurWfrYuTiEBKYzigxceolVgjnDaPE18kTmECq WARUJaZ+3cUMYrMJ6El8vvsULC4iYCGxdsVbFpAGZoF9rBLn599nAUkIC0RJNPT0A43l4OAF ati1kQ0kzCngKXFjyRSobe2MEjO+zQYbyi8gKdH+7wczxEl2Euc+bQA7j1dAUOLH5HtgM5kF tCQ2b2tihbDlJTavecs8gVFwFpKyWUjKZiEpW8DIvIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/ dxMjODqfSe9gXNVgcYhRgINRiYeXgcs8VIg1say4MvcQowQHs5IIb7ItUIg3JbGyKrUoP76o NCe1+BCjNAeLkjjvHF25UCGB9MSS1OzU1ILUIpgsEwenVAOjmu6RNv9+ezd/39M7uEu9HHZ3 dZkekFqk7Vc5WW/dduX6F11zt92PfecZWXIr9dPn774XT63cHbw8P1XbJCjSaEVXybdw/pLV uhH+ha5LeF583Oca2Pj/k8NOV4uLlzR2/vGZuK6Mcd2sCjVX79L7S7irDjJ8eJSxpoJZda2U sfSXu7yH7ecosRRnJBpqMRcVJwIAcRukosoCAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bartlomiej, > From: Thomas Abraham > > For Exynos5420 platforms, add CPU operating points and CPU > regulator supply properties for migrating from Exynos specific > cpufreq driver to using generic cpufreq driver. > > Changes by Bartlomiej: > - split Exynos5420 support from the original patch > > Cc: Kukjin Kim > Cc: Doug Anderson > Cc: Javier Martinez Canillas > Cc: Andreas Faerber > Cc: Sachin Kamat > Signed-off-by: Thomas Abraham > Signed-off-by: Bartlomiej Zolnierkiewicz > --- > arch/arm/boot/dts/exynos5420.dtsi | 38 > +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi > b/arch/arm/boot/dts/exynos5420.dtsi index f67b23f..85b9cfc 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -59,8 +59,26 @@ > device_type = "cpu"; > compatible = "arm,cortex-a15"; > reg = <0x0>; > + clocks = <&clock CLK_ARM_CLK>; > + clock-names = "cpu-cluster.0"; > clock-frequency = <1800000000>; > cci-control-port = <&cci_control1>; > + clock-latency = <140000>; > + > + operating-points = < > + 1800000 1250000 > + 1700000 1212500 > + 1600000 1175000 > + 1500000 1137500 > + 1400000 1112500 > + 1300000 1062500 > + 1200000 1037500 > + 1100000 1012500 > + 1000000 987500 > + 900000 962500 > + 800000 937500 > + 700000 912500 > + >; > }; > > cpu1: cpu@1 { > @@ -69,6 +87,7 @@ > reg = <0x1>; > clock-frequency = <1800000000>; > cci-control-port = <&cci_control1>; > + clock-latency = <140000>; > }; > > cpu2: cpu@2 { > @@ -77,6 +96,7 @@ > reg = <0x2>; > clock-frequency = <1800000000>; > cci-control-port = <&cci_control1>; > + clock-latency = <140000>; > }; > > cpu3: cpu@3 { > @@ -85,14 +105,29 @@ > reg = <0x3>; > clock-frequency = <1800000000>; > cci-control-port = <&cci_control1>; > + clock-latency = <140000>; > }; > > cpu4: cpu@100 { > device_type = "cpu"; > compatible = "arm,cortex-a7"; > reg = <0x100>; > + clocks = <&clock CLK_KFC_CLK>; > + clock-names = "cpu-cluster.1"; > clock-frequency = <1000000000>; > cci-control-port = <&cci_control0>; > + clock-latency = <140000>; > + > + operating-points = < > + 1300000 1275000 > + 1200000 1212500 > + 1100000 1162500 > + 1000000 1112500 > + 900000 1062500 > + 800000 1025000 > + 700000 975000 > + 600000 937500 > + >; > }; > > cpu5: cpu@101 { > @@ -101,6 +136,7 @@ > reg = <0x101>; > clock-frequency = <1000000000>; > cci-control-port = <&cci_control0>; > + clock-latency = <140000>; > }; > > cpu6: cpu@102 { > @@ -109,6 +145,7 @@ > reg = <0x102>; > clock-frequency = <1000000000>; > cci-control-port = <&cci_control0>; > + clock-latency = <140000>; > }; > > cpu7: cpu@103 { > @@ -117,6 +154,7 @@ > reg = <0x103>; > clock-frequency = <1000000000>; > cci-control-port = <&cci_control0>; > + clock-latency = <140000>; > }; > }; > Reviewed-by: Lukasz Majewski -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group