Re: Question about barriers for ARM on tools/perf/

From: Will Deacon <will.deacon@arm.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
	Ingo Molnar <mingo@kernel.org>, David Ahern <dsahern@gmail.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@gmail.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: Question about barriers for ARM on tools/perf/
Date: Fri, 8 May 2015 15:27:11 +0100	[thread overview]
Message-ID: <20150508142711.GC25587@arm.com> (raw)
In-Reply-To: <20150508142513.GM27504@twins.programming.kicks-ass.net>

On Fri, May 08, 2015 at 03:25:13PM +0100, Peter Zijlstra wrote:
> On Fri, May 08, 2015 at 03:21:08PM +0100, Will Deacon wrote:
> > Wouldn't it be better to go the other way, and use compiler builtins for
> > the memory barriers instead of relying on the kernel? It looks like the
> > perf_mmap__{read,write}_head functions are basically just acquire/release
> > operations and could therefore be implemented using something like
> > __atomic_load_n(&pc->data_head, __ATOMIC_ACQUIRE) and
> > __atomic_store_n(&pc->data_tail, tail, __ATOMIC_RELEASE).
> 
> He wants to do smp refcounting, which needs atomic_inc() /
> atomic_inc_non_zero() / atomic_dec_return() etc..

Right, of course, but GCC has those too:

  https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html

Will