From: Jean Delvare <jdelvare@suse.de>
To: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-i2c@vger.kernel.org, linux-sh@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>,
Simon Horman <horms@verge.net.au>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
linux-kernel@vger.kernel.org
Subject: Re: [RFC] i2c-tools: i2ctransfer: add new tool
Date: Fri, 8 May 2015 23:40:42 +0200 [thread overview]
Message-ID: <20150508234042.26708f86@endymion.delvare> (raw)
In-Reply-To: <20150508143826.GA1513@katana>
Hi Wolfram,
On Fri, 8 May 2015 16:38:26 +0200, Wolfram Sang wrote:
> > Having slept over it, I came up with a 3rd proposal:
> >
> > # i2ctransfer 0 w0x11@0x50 0xc0 0xbd= r1@0x51
> >
> > That is, combining the slave address, direction and length into a
> > single parameter. The advantage is that this is all more explicit and
> > the risk of mixing up values is close to zero. Whether it is more or
> > less readable than the previous proposals is probably a matter of
> > taste. Also I suspect it would make the parsing and state machine more
> > simple, but that's only a nice side effect.
> >
> > Wolfram (and others), please tell me what you think. I am not trying to
> > force my views here, just suggesting alternatives for your
> > consideration.
>
> I liked your proposal, so thanks for this input. I agree that the risk
> of mixing something up is high, I was okay with the printout of the
> messages to be sent, but a better syntax is very welcome, too. I need to
> think about the flags a little bit, though. Although this isn't
> implemented yet, PEC and 10-bit flags might be added in the future?
This is a good point, we need to think about it. Maybe not PEC, as
normally any PEC-enabled transaction would be handled by the other
tools already. And I don't think the kernel can handle PEC over ioctl
I2C_RDWR anyway. But 10-bit addresses, we already had a request to
support than and your new tool would be perfect for that.
One easy way would be to assume that the transaction either targets one
or more 10-bit addressed chips, or one or more 7-bit addressed chips,
but doesn't mix. In that case a simple flag (say -t) in front of the
transaction will do the trick. I'd think it is sufficient, and I even
suspect that some controllers may only support that, but OTOH I never
worked with 10-bit addressed chips so I can't really tell.
If you think it's not enough, then the address modifier could go
separately before or after the address byte, i.e. either r1@0x123t or
r1@t0x123. I suspect that the latter should be easier to implement.
> Handling R/W as "just another" flag made this option extremly simple.
> But we probably can work something out.
I think the proposal above makes more sense than grouping it with the
direction letter (r or w) even though it's also a letter, as it's
really an address modifier, which affects neither the direction nor the
length. But again it's really only a suggestion, if you can come up
with something clearer and/or easier to implement, please do.
> So much for the quick response, I'll have a closer look later.
I wouldn't call it "quick" ;-) but you're welcome.
--
Jean Delvare
SUSE L3 Support
next prev parent reply other threads:[~2015-05-08 21:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-27 16:16 [RFC] i2c-tools: i2ctransfer: add new tool Wolfram Sang
2015-04-20 17:36 ` Wolfram Sang
2015-04-21 5:25 ` Jean Delvare
2015-04-21 7:06 ` Wolfram Sang
2015-05-07 20:08 ` Jean Delvare
2015-05-08 8:54 ` Jean Delvare
2015-05-08 14:38 ` Wolfram Sang
2015-05-08 21:40 ` Jean Delvare [this message]
2015-05-09 6:50 ` Wolfram Sang
2015-05-08 15:28 ` Randy Grunwell
2015-05-08 18:28 ` Uwe Kleine-König
2015-05-08 20:58 ` Jean Delvare
2015-05-09 7:09 ` Wolfram Sang
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