From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755282AbbESIua (ORCPT ); Tue, 19 May 2015 04:50:30 -0400 Received: from mail.skyhub.de ([78.46.96.112]:54828 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751903AbbESIuZ (ORCPT ); Tue, 19 May 2015 04:50:25 -0400 Date: Tue, 19 May 2015 10:50:17 +0200 From: Borislav Petkov To: Huang Rui Cc: Len Brown , "Rafael J. Wysocki" , "linux-kernel@vger.kernel.org" , Fengguang Wu , Aaron Lu , "Li, Tony" , Thomas Gleixner Subject: Re: Mwait usage on AMD processors Message-ID: <20150519085017.GA4641@pd.tnic> References: <20150514065451.GA29830@hr-slim.amd.com> <20150514092137.GA29235@pd.tnic> <20150514101727.GA6552@hr-slim.amd.com> <20150514112303.GC29125@pd.tnic> <20150514133857.GB6552@hr-slim.amd.com> <20150514142051.GD29125@pd.tnic> <20150519072552.GA28547@hr-slim.amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20150519072552.GA28547@hr-slim.amd.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 19, 2015 at 03:25:53PM +0800, Huang Rui wrote: > Apology that cause to misunderstand. It's not as same as intel. > Intel is able to go to C1E like you said, the C1E has less power > consumption than C1 on Intel platform. You still misunderstand - I'm not talking about Intel platforms here but AMD ones. On AMD we never enter idle with MWAIT - we do HLT which enters C1 and then the hw enters C1E when a bunch of conditions are fulfilled. > The faster waiting exit speed. But it's hard to test the improvement, > do you have any idea? It's told by HW designer. You can test the improvement with a special setup only. Unless you can read out power consumption of a box while it is idle. The exit-idle speed only does not suffice to switch to MWAIT though, IMHO. I think power consumption in idle should be the relevant metric here. > Current CPU, power consumption cannot go to deeper low power state > (C1) via mwaitx/mwait. But HW designers will implement it in future > processors. So future CPUs we will switch to MWAIT. I don't see a problem with that. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --