From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755178AbbFOPuF (ORCPT ); Mon, 15 Jun 2015 11:50:05 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:58823 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753288AbbFOPt4 (ORCPT ); Mon, 15 Jun 2015 11:49:56 -0400 Date: Mon, 15 Jun 2015 16:49:35 +0100 From: Mark Brown To: Cyrille Pitchen Cc: nicolas.ferre@atmel.com, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org Message-ID: <20150615154935.GT18309@sirena.org.uk> References: <20150609172531.GM14071@sirena.org.uk> <5579B95F.9060307@atmel.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6axCafNXXMM8qu6Q" Content-Disposition: inline In-Reply-To: <5579B95F.9060307@atmel.com> X-Cookie: do { User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: 81.129.82.198 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [PATCH v3 2/3] spi: atmel: update DT bindings documentation X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --6axCafNXXMM8qu6Q Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 11, 2015 at 06:37:51PM +0200, Cyrille Pitchen wrote: > Le 09/06/2015 19:25, Mark Brown a =E9crit : > > On Tue, Jun 09, 2015 at 01:53:53PM +0200, Cyrille Pitchen wrote: > >> - add new property "atmel,fifo-size" > > Why is this a property and not something we know from the IP version? > Please be aware that the VERSION register can not be used to guess the > size of FIFOs. Indeed, for a given hardware version, the SPI controller > can be integrated on Atmel SoCs with different FIFO sizes. Also the > "atmel,fifo-size" property is optional as older SPI controllers don't > embed FIFO at all. =2E.. > Finally, on a given SoC, there can be several instances of the SPI > controller with different FIFO sizes. This explain why we'd rather use a > dedicated DT property than use the "compatible" property. > I hope these pieces of information will help to clarify this point. > Of course, we are open to other suggestions. Ugh, what a wonderfully consistent hardware design :( Please make it clear in the documentation what is going on here, this looks like an obvious bug in the DT binding - a very common pattern for bugs is to do version quirks like this as properties. --6axCafNXXMM8qu6Q Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJVfvQPAAoJECTWi3JdVIfQDywH/RbQKXr2U2+f72kbeIxz56M1 3mboyhxyFzn7whzNbyAefS1lWdIQvVCv841JHRuAgBJj8PSTwkLYFC5cOuQTe7Nh qEm9PnEA5gk0/W5WbxixprOR9llRw538bX4ad6XmKNORnSF7q9Ch+lx0bNV50v7+ 4mSu03rj7VmMgLwP6SpAA6BT9Eu707bSWMpUgavpgGWGfI7nXXlpdolYQ5PVfr04 qM3Opabni7yTUi+YSMiR4J7mSzZnUbCroqtEkg4j/c7R2oTCHYrNF2N9mj8i8vRj q5W1yfc1cCIFFR/Yx2Twy4inrY5+ffKLR9YD3HcLGBIf68awPHGHMlVQXJBOFRE= =aZfm -----END PGP SIGNATURE----- --6axCafNXXMM8qu6Q--