linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Andi Kleen <ak@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Andi Kleen <andi@firstfloor.org>,
	eranian@google.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] x86, perf: Support custom test values for extra_regs
Date: Tue, 30 Jun 2015 08:44:51 -0700	[thread overview]
Message-ID: <20150630154451.GA25760@tassilo.jf.intel.com> (raw)
In-Reply-To: <20150630111907.GF3644@twins.programming.kicks-ass.net>

On Tue, Jun 30, 2015 at 01:19:07PM +0200, Peter Zijlstra wrote:
> On Mon, Jun 29, 2015 at 02:22:14PM -0700, Andi Kleen wrote:
> > From: Andi Kleen <ak@linux.intel.com>
> > 
> > Current kernels always test extra registers at boot with RMW
> > cycle, to catch lying virtual machines.
> > 
> > For a new register the standard 0x1ff test value does not work,
> > as 0x1ff is not a valid value and causes an #GP.
> > 
> > Add the ability to add custom test values to an extra_reg
> > into the description tables.
> 
> Just wondering; is there not a test value that works for all registers?

0x11 will likely work everywhere.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only

  reply	other threads:[~2015-06-30 15:44 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-29 21:22 [PATCH 1/3] x86, perf: Make merge_attr global to use from perf_event_intel Andi Kleen
2015-06-29 21:22 ` [PATCH 2/3] x86, perf: Support custom test values for extra_regs Andi Kleen
2015-06-30 11:19   ` Peter Zijlstra
2015-06-30 15:44     ` Andi Kleen [this message]
2015-06-29 21:22 ` [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake Andi Kleen
2015-07-17 19:47   ` Stephane Eranian
2015-07-17 20:09     ` Andi Kleen
2015-07-17 20:11       ` Thomas Gleixner
2015-07-17 20:33         ` Andi Kleen
2015-07-17 21:01           ` Stephane Eranian
2015-07-17 21:19             ` Andi Kleen
2015-07-17 22:00               ` Stephane Eranian
2015-07-17 23:31                 ` Andi Kleen
2015-07-17 23:52                   ` Stephane Eranian
2015-07-18 14:23                     ` Andi Kleen
2015-07-17 22:16           ` Thomas Gleixner
2015-07-17 20:41       ` Stephane Eranian
2015-07-17 20:52         ` Andi Kleen
2015-07-17 21:05           ` Peter Zijlstra
2015-07-17 21:18             ` Andi Kleen
2015-07-17 22:23               ` Thomas Gleixner
2015-08-04  9:00 ` [tip:perf/core] perf/x86: Make merge_attr() global to use from perf_event_intel tip-bot for Andi Kleen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150630154451.GA25760@tassilo.jf.intel.com \
    --to=ak@linux.intel.com \
    --cc=andi@firstfloor.org \
    --cc=eranian@google.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=peterz@infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).