From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@intel.com>
Cc: Vince Weaver <vincent.weaver@maine.edu>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Stephane Eranian <eranian@gmail.com>
Subject: Re: perf: fuzzer triggered warning in intel_pmu_drain_pebs_nhm()
Date: Mon, 6 Jul 2015 12:55:17 +0200 [thread overview]
Message-ID: <20150706105517.GZ3644@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <37D7C6CF3E00A74B8858931C1DB2F07701885A65@SHSMSX103.ccr.corp.intel.com>
On Fri, Jul 03, 2015 at 08:08:27PM +0000, Liang, Kan wrote:
> If we cleared the last bit, we not only drain the buffer but also decrease
> the event->ctx->pmu, which is used to flush the PEBS buffer during
> context switches.
> We need to disable cpuc->pebs_enabled before changing
> event->ctx->pmu as below.
>
Indeed, mind sending a proper patch so I can press 'A' on it?
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> index 71fc402..76285c1 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> @@ -754,6 +754,11 @@ void intel_pmu_pebs_disable(struct
> perf_event *event)
> struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> struct hw_perf_event *hwc = &event->hw;
> struct debug_store *ds = cpuc->ds;
> + bool large_pebs = ds->pebs_interrupt_threshold >
> + ds->pebs_buffer_base + x86_pmu.pebs_record_size;
> +
> + if (large_pebs)
> + intel_pmu_drain_pebs_buffer();
>
> cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
>
> @@ -762,12 +767,8 @@ void intel_pmu_pebs_disable(struct
> perf_event *event)
> else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)
> cpuc->pebs_enabled &= ~(1ULL << 63);
>
> - if (ds->pebs_interrupt_threshold >
> - ds->pebs_buffer_base + x86_pmu.pebs_record_size) {
> - intel_pmu_drain_pebs_buffer();
> - if (!pebs_is_enabled(cpuc))
> - perf_sched_cb_dec(event->ctx->pmu);
> - }
> + if (large_pebs && !pebs_is_enabled(cpuc))
> + perf_sched_cb_dec(event->ctx->pmu);
>
> if (cpuc->enabled)
> wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
>
>
>
> Thanks,
> Kan
next prev parent reply other threads:[~2015-07-06 10:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-02 15:18 perf: fuzzer triggered warning in intel_pmu_drain_pebs_nhm() Vince Weaver
2015-07-02 19:43 ` Peter Zijlstra
2015-07-03 13:13 ` Peter Zijlstra
2015-07-03 18:56 ` Stephane Eranian
2015-07-03 19:04 ` Peter Zijlstra
2015-07-03 19:49 ` Vince Weaver
2015-07-15 6:42 ` Stephane Eranian
2015-07-15 12:35 ` Peter Zijlstra
2015-07-16 6:02 ` Stephane Eranian
2015-07-16 7:15 ` Peter Zijlstra
2015-07-16 7:30 ` Stephane Eranian
2015-07-16 21:12 ` Stephane Eranian
2015-07-03 19:03 ` Vince Weaver
2015-07-03 20:08 ` Liang, Kan
2015-07-06 10:55 ` Peter Zijlstra [this message]
2015-07-06 13:47 ` Liang, Kan
2015-07-06 16:22 ` Vince Weaver
2015-07-06 16:23 ` Liang, Kan
2015-07-06 16:51 ` Vince Weaver
2015-08-04 9:01 ` [tip:perf/core] perf/x86/intel/pebs: Fix event disable PEBS buffer drain tip-bot for Liang, Kan
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