From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752298AbbGIJsx (ORCPT ); Thu, 9 Jul 2015 05:48:53 -0400 Received: from foss.arm.com ([217.140.101.70]:45136 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751081AbbGIJsk (ORCPT ); Thu, 9 Jul 2015 05:48:40 -0400 Date: Thu, 9 Jul 2015 10:48:18 +0100 From: Mark Rutland To: Marc Zyngier Cc: Catalin Marinas , Will Deacon , Christoffer Dall , "kvmarm@lists.cs.columbia.edu" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvm@vger.kernel.org" Subject: Re: [PATCH 03/13] arm64: Add ARM64_HAS_VIRT_HOST_EXTN feature Message-ID: <20150709094818.GB20105@leverpostej> References: <1436372356-30410-1-git-send-email-marc.zyngier@arm.com> <1436372356-30410-4-git-send-email-marc.zyngier@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1436372356-30410-4-git-send-email-marc.zyngier@arm.com> Thread-Topic: [PATCH 03/13] arm64: Add ARM64_HAS_VIRT_HOST_EXTN feature Accept-Language: en-GB, en-US Content-Language: en-US User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 08, 2015 at 05:19:06PM +0100, Marc Zyngier wrote: > Add a new ARM64_HAS_VIRT_HOST_EXTN features to indicate that the > CPU has the ARMv8,1 VHE capability. Nit: s/,/./ It's probably worth mentioning somewhere that we have to check CurrentEL rather than a feature register in case some prior software dropped us to EL1N (e.g. if we're a guest under this scheme). Mark. > > This will be used to trigger kernel patching in KVM. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/include/asm/cpufeature.h | 3 ++- > arch/arm64/kernel/cpufeature.c | 11 +++++++++++ > 2 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index c104421..6c3742d 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -25,8 +25,9 @@ > #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 > #define ARM64_WORKAROUND_845719 2 > #define ARM64_HAS_SYSREG_GIC_CPUIF 3 > +#define ARM64_HAS_VIRT_HOST_EXTN 4 > > -#define ARM64_NCAPS 4 > +#define ARM64_NCAPS 5 > > #ifndef __ASSEMBLY__ > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 5ad86ce..e1dcd63 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -21,6 +21,7 @@ > #include > #include > #include > +#include > > static bool > has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry) > @@ -31,6 +32,11 @@ has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry) > return (val & entry->register_mask) == entry->register_value; > } > > +static bool runs_at_el2(const struct arm64_cpu_capabilities *entry) > +{ > + return is_kernel_in_hyp_mode(); > +} > + > static const struct arm64_cpu_capabilities arm64_features[] = { > { > .desc = "GIC system register CPU interface", > @@ -39,6 +45,11 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .register_mask = (0xf << 24), > .register_value = (1 << 24), > }, > + { > + .desc = "Virtualization Host Extensions", > + .capability = ARM64_HAS_VIRT_HOST_EXTN, > + .matches = runs_at_el2, > + }, > {}, > }; > > -- > 2.1.4 > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm >