From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754924AbbGQXbD (ORCPT ); Fri, 17 Jul 2015 19:31:03 -0400 Received: from mga03.intel.com ([134.134.136.65]:37007 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754153AbbGQXbB (ORCPT ); Fri, 17 Jul 2015 19:31:01 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,497,1432623600"; d="scan'208";a="766642612" Date: Fri, 17 Jul 2015 16:31:00 -0700 From: Andi Kleen To: Stephane Eranian Cc: Thomas Gleixner , Andi Kleen , Peter Zijlstra , LKML Subject: Re: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake Message-ID: <20150717233100.GN7380@tassilo.jf.intel.com> References: <1435612935-24425-1-git-send-email-andi@firstfloor.org> <1435612935-24425-3-git-send-email-andi@firstfloor.org> <20150717200900.GE7380@tassilo.jf.intel.com> <20150717203315.GI7380@tassilo.jf.intel.com> <20150717211955.GK7380@tassilo.jf.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 17, 2015 at 03:00:18PM -0700, Stephane Eranian wrote: > Andi, > > On Fri, Jul 17, 2015 at 2:19 PM, Andi Kleen wrote: > >> But then, the SDM is misleading. It is not describing what's > >> implemented for SKL. > > > > Actually it has a list of valid values you can put into the various fields. > > None of them have the bits set you're trying to set. > > > You are talking about the events (bit 0-7). I am talking about the bubble > thresholds. I am okay with the event list for bits 0-7. Fair enough. There's a one-off in the MSR table and table 18-54. The IDQ bubble width is only 21:20. I'll ask for that to be fixed in both places that document them. Thanks. -Andi