From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759013AbbIDL0F (ORCPT ); Fri, 4 Sep 2015 07:26:05 -0400 Received: from foss.arm.com ([217.140.101.70]:43214 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758996AbbIDL0A (ORCPT ); Fri, 4 Sep 2015 07:26:00 -0400 Date: Fri, 4 Sep 2015 12:25:56 +0100 From: Catalin Marinas To: Alexander Kuleshov Cc: Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/3] arm64/cpufeature.h: Add macros for a cpu features testing Message-ID: <20150904112555.GB17253@e104818-lin.cambridge.arm.com> References: <1441303911-9421-1-git-send-email-kuleshovmail@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1441303911-9421-1-git-send-email-kuleshovmail@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 04, 2015 at 12:11:51AM +0600, Alexander Kuleshov wrote: > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -28,7 +28,50 @@ > > #define ARM64_NCAPS 4 > > +/* > + * ID_AA64ISAR0_EL1 AES, bits [7:4] > + */ > +#define ID_AA64ISAR0_EL1_AES_MASK 4 > +#define ID_AA64ISAR0_EL1_AES(feature) \ > + (((feature >> ID_AA64ISAR0_EL1_AES_MASK) & 0xf) & 1UL) This looks more like a shift than a mask. I don't think it's worth defining another macro for the shift. > +#define ID_AA64ISAR0_EL1_PMULL(feature) \ > + (((feature >> ID_AA64ISAR0_EL1_AES_MASK) & 0xf) & 2UL) I'm not against some clean-up here but I think you break the original logic. AES and PMULL are not exclusive, the latter implies the former but the way you check here is just individual bits. These id fields are meant to be treated as 4-bit signed values, so if AES means >= 1, PMULL means >= 2. We have a cpuid_feature_extract_field() (in linux-next and about to go in 4.3-rc1), so use this one for extracting the signed 4-bit field. -- Catalin