From: Vinod Koul <vinod.koul@intel.com>
To: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
Cc: dan.j.williams@intel.com, anirudh@xilinx.com,
michal.simek@xilinx.com, soren.brinkmann@xilinx.com,
appanad@xilinx.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support
Date: Mon, 5 Oct 2015 14:39:09 +0100 [thread overview]
Message-ID: <20151005133907.GA13501@vkoul-mobl.iind.intel.com> (raw)
In-Reply-To: <1441629198-17663-1-git-send-email-appanad@xilinx.com>
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> This is the driver for the AXI Central Direct Memory Access (AXI
> CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth
> Direct Memory Access (DMA) between a memory-mapped source address and a
> memory-mapped destination address.
Where is the 1/2 here ? I have only this one in my mails..
--
~Vinod
next prev parent reply other threads:[~2015-10-05 13:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-07 12:33 [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support Kedareswara rao Appana
2015-10-05 13:39 ` Vinod Koul [this message]
2015-10-05 13:50 ` Appana Durga Kedareswara Rao
2015-10-05 14:10 ` Koul, Vinod
2015-10-05 14:19 ` Appana Durga Kedareswara Rao
2015-10-05 15:18 ` Vinod Koul
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