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From: Vinod Koul <vinod.koul@intel.com>
To: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
Cc: "dan.j.williams@intel.com" <dan.j.williams@intel.com>,
	Michal Simek <michals@xilinx.com>,
	Soren Brinkmann <sorenb@xilinx.com>,
	"moritz.fischer@ettus.com" <moritz.fischer@ettus.com>,
	"anirudha@xilinx.com" <anirudha@xilinx.com>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Anirudha Sarangi <anirudh@xilinx.com>
Subject: Re: [PATCH v9] dmaengine: Add Xilinx AXI Direct Memory Access Engine driver support
Date: Tue, 6 Oct 2015 08:45:02 +0100	[thread overview]
Message-ID: <20151006074459.GA23420@vkoul-mobl.iind.intel.com> (raw)
In-Reply-To: <C246CAC1457055469EF09E3A7AC4E11A4A4EC2DE@XAP-PVEXMBX01.xlnx.xilinx.com>

On Mon, Oct 05, 2015 at 03:48:39PM +0000, Appana Durga Kedareswara Rao wrote:
> > Pls justify why we should have two drivers. Looking at code makes me think
> > otherwise
> 
>
[pls wrap your messages within 80 chars, I have reflowed below]
 
> I agree with you and even initially we had a common driver with the
> similar implementation as you were mentioning.  Later on, being soft IPs,
> new features were added and the IPs became diversified. As an example,
> this driver has a residue Calculation whereas the other driver (VDMA) is
> not applicable and the way interrupts are handled is completely different.
> Briefly, they are two complete different IPs with a different register set
> and descriptor format. Eventually, it became too complex To manage the
> common driver as the code became messy with lot of conditions around.
> Mainly the validation process is a big concern, as every change In the IP
> compels to test all the complete features of both IPs.  So, we got
> convinced to the approach of separating the drivers to overcome this and
> it comes with Few addition lines of common code.

No it is not that hard, bunch of people already do that.

You need is a smart probe or perhaps invoke IP specfic method to
initialize dma controller.

In above case no one forces you to register status callback for both, you
can do based on the controller probed...

I am sorry but validation is not a strong point here. I have a driver which
manages bunch of different generations. Reuse helps in having lesser code
and bug fixes across generations easily..

We cant have two drivers pretty much doing same thing in kernel

Please fix this and come back

-- 
~Vinod

  reply	other threads:[~2015-10-06  7:45 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-24 16:11 [PATCH v9] dmaengine: Add Xilinx AXI Direct Memory Access Engine driver support Kedareswara rao Appana
2015-08-27 14:30 ` Moritz Fischer
2015-08-28  6:31   ` Michal Simek
2015-09-21 17:17     ` Moritz Fischer
2015-10-05 13:01       ` Appana Durga Kedareswara Rao
2015-10-05 15:26 ` Vinod Koul
2015-10-05 15:48   ` Appana Durga Kedareswara Rao
2015-10-06  7:45     ` Vinod Koul [this message]
2015-11-10 10:23       ` Appana Durga Kedareswara Rao
2015-11-11 10:55         ` Vinod Koul
2015-11-11 12:22           ` Appana Durga Kedareswara Rao

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