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Date: Thu, 22 Oct 2015 10:57:45 +0200
From: Jean-Francois Moine <moinejf@free.fr>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Jens Kuske <jenskuske@gmail.com>, devicetree@vger.kernel.org,
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        Philipp Zabel <p.zabel@pengutronix.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
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On Thu, 22 Oct 2015 10:47:35 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:

> Not really. The uart0 reset is the bit 16, in the reset register 4.
> 
> 4 * 32 + 16 = 44.
> 
> Not 112, but still not 208 either.

The registers are numbered 1..5, then

(4 - 1) * 32 + 16 = 112

-- 
Ken ar c'hentañ	|	      ** Breizh ha Linux atav! **
Jef		|		http://moinejf.free.fr/