From: Han Xu <han.xu@freescale.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Han Xu <b45815@freescale.com>, <shijie.huang@arm.com>,
David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
<boris.brezillon@free-electrons.com>,
<fabio.estevam@freescale.com>, <hofrat@osadl.org>,
"open list:MEMORY TECHNOLOGY..." <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Vinod Koul <vinod.koul@intel.com>,
"Dan Williams" <dan.j.williams@intel.com>,
dmaengine <dmaengine@vger.kernel.org>
Subject: Re: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support
Date: Thu, 29 Oct 2015 16:09:18 -0500 [thread overview]
Message-ID: <20151029210918.GA7854@chopperman.am.freescale.net> (raw)
In-Reply-To: <CAHp75Vf3OddaGgwrOyk0EE46oFmjoRt+rj3su2VBJQwUnGdRAw@mail.gmail.com>
On Thu, Oct 29, 2015 at 11:08:10PM +0200, Andy Shevchenko wrote:
> On Wed, Oct 28, 2015 at 12:05 AM, Han Xu <b45815@freescale.com> wrote:
> > From: Adrian Alonso <aalonso@freescale.com>
> >
> > supports APBH DMA on i.MX7D by add extra clock clk_io
>
> []
>
any comments here?
> > MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);
> > @@ -440,6 +448,13 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
> > if (ret)
> > goto err_clk;
> >
> > + /* enable the extra clk_io clock for i.MX7D */
> > + if (mxs_dma->dev_id == IMX7D_DMA) {
> > + ret = clk_prepare_enable(mxs_dma->clk_io);
> > + if (ret)
> > + goto err_clk_unprepare;
>
> Perhaps err_clk.
>
> > + }
> > +
> > mxs_dma_reset_chan(chan);
> >
> > dma_async_tx_descriptor_init(&mxs_chan->desc, chan);
> > @@ -450,6 +465,8 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
> >
> > return 0;
> >
> > +err_clk_unprepare:
> > + clk_disable_unprepare(mxs_dma->clk);
> > err_clk:
> > free_irq(mxs_chan->chan_irq, mxs_dma);
> > err_irq:
> > @@ -471,6 +488,9 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan)
> > dma_free_coherent(mxs_dma->dma_device.dev, CCW_BLOCK_SIZE,
> > mxs_chan->ccw, mxs_chan->ccw_phys);
> >
> > + if (mxs_dma->dev_id == IMX7D_DMA)
> > + clk_disable_unprepare(mxs_dma->clk_io);
> > +
> > clk_disable_unprepare(mxs_dma->clk);
> > }
> >
> > @@ -701,9 +721,15 @@ static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)
> > if (ret)
> > return ret;
> >
> > + if (mxs_dma->dev_id == IMX7D_DMA) {
> > + ret = clk_prepare_enable(mxs_dma->clk_io);
> > + if (ret)
> > + goto err_clk_bch;
> > + }
> > +
> > ret = stmp_reset_block(mxs_dma->base);
> > if (ret)
> > - goto err_out;
> > + goto err_clk_io;
> >
> > /* enable apbh burst */
> > if (dma_is_apbh(mxs_dma)) {
> > @@ -717,7 +743,10 @@ static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)
> > writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
> > mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);
> >
> > -err_out:
> > +err_clk_io:
> > + if (mxs_dma->dev_id == IMX7D_DMA)
> > + clk_disable_unprepare(mxs_dma->clk_io);
> > +err_clk_bch:
> > clk_disable_unprepare(mxs_dma->clk);
> > return ret;
> > }
> > @@ -803,9 +832,19 @@ static int __init mxs_dma_probe(struct platform_device *pdev)
> > if (IS_ERR(mxs_dma->base))
> > return PTR_ERR(mxs_dma->base);
> >
> > - mxs_dma->clk = devm_clk_get(&pdev->dev, NULL);
> > - if (IS_ERR(mxs_dma->clk))
> > - return PTR_ERR(mxs_dma->clk);
> > + if (mxs_dma->dev_id == IMX7D_DMA) {
> > + mxs_dma->clk = devm_clk_get(&pdev->dev, "dma_apbh_bch");
> > + if (IS_ERR(mxs_dma->clk))
> > + return PTR_ERR(mxs_dma->clk);
> > + mxs_dma->clk_io = devm_clk_get(&pdev->dev, "dma_apbh_io");
> > + if (IS_ERR(mxs_dma->clk_io))
> > + return PTR_ERR(mxs_dma->clk_io);
> > +
>
> Redundant empty line.
>
> > + } else {
> > + mxs_dma->clk = devm_clk_get(&pdev->dev, NULL);
> > + if (IS_ERR(mxs_dma->clk))
> > + return PTR_ERR(mxs_dma->clk);
> > + }
>
>
>
> --
> With Best Regards,
> Andy Shevchenko
--
Best Regards,
Han "Allen" Xu
next prev parent reply other threads:[~2015-10-29 21:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-27 22:05 [PATCH v7 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support Han Xu
2015-10-27 22:05 ` [PATCH v7 1/7] mtd: nand: gpmi: add gpmi dsm supend/resume support Han Xu
2015-10-27 22:05 ` [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode Han Xu
2015-10-27 23:25 ` Fabio Estevam
2015-10-31 1:42 ` Vinod Koul
2015-11-02 15:29 ` Thomas Petazzoni
2015-11-02 15:46 ` [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode' Vinod Koul
2015-10-27 22:05 ` [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support Han Xu
2015-10-29 21:08 ` Andy Shevchenko
2015-10-29 21:03 ` Han Xu
2015-10-29 21:17 ` Andy Shevchenko
2015-10-29 21:09 ` Han Xu [this message]
2015-10-27 22:05 ` [PATCH v7 4/7] mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NAND Han Xu
2015-10-27 22:05 ` [PATCH v7 5/7] mtd: nand: gpmi: add GPMI NAND support for i.MX7D Han Xu
2015-10-27 22:05 ` [PATCH v7 6/7] mtd: nand: gpmi: correct bitflip for erased NAND page Han Xu
2015-10-27 22:05 ` [PATCH v7 7/7] mtd: nand: gpmi: support NAND on i.MX6UL Han Xu
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