From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030635AbbKDQ0H (ORCPT ); Wed, 4 Nov 2015 11:26:07 -0500 Received: from down.free-electrons.com ([37.187.137.238]:60618 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1030453AbbKDQZ3 (ORCPT ); Wed, 4 Nov 2015 11:25:29 -0500 Date: Wed, 4 Nov 2015 08:24:56 -0800 From: Maxime Ripard To: Arnd Bergmann Cc: linux-arm-kernel@lists.infradead.org, Jens Kuske , Chen-Yu Tsai , Michael Turquette , Linus Walleij , Rob Herring , Philipp Zabel , Emilio =?iso-8859-1?Q?L=F3pez?= , devicetree@vger.kernel.org, Vishnu Patekar , linux-kernel@vger.kernel.org, Hans de Goede , linux-sunxi@googlegroups.com Subject: Re: [PATCH v4 2/6] clk: sunxi: Add H3 clocks support Message-ID: <20151104162456.GA6114@lukather> References: <1445964626-6484-1-git-send-email-jenskuske@gmail.com> <1445964626-6484-3-git-send-email-jenskuske@gmail.com> <3751073.AWmm18dvKK@wuerfel> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="XZLT0nNRngx3qG4/" Content-Disposition: inline In-Reply-To: <3751073.AWmm18dvKK@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --XZLT0nNRngx3qG4/ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Arnd, On Fri, Oct 30, 2015 at 09:28:55AM +0100, Arnd Bergmann wrote: > On Tuesday 27 October 2015 17:50:22 Jens Kuske wrote: > > + of_property_read_string_index(node, "clock-output-names= ", > > + i, &clk_name); > > + > > + if (index =3D=3D 17 || (index >=3D 29 && index <=3D 31)) > > + clk_parent =3D AHB2; > > + else if (index <=3D 63 || index >=3D 128) > > + clk_parent =3D AHB1; > > + else if (index >=3D 64 && index <=3D 95) > > + clk_parent =3D APB1; > > + else if (index >=3D 96 && index <=3D 127) > > + clk_parent =3D APB2; > > + > > + clk_reg =3D reg + 4 * (index / 32); > >=20 >=20 > Same as for the reset driver, this probably means you should have one > cell to indicate which bus it is for, and another cell for the > index. It's not really comparable to the reset driver. What's happening here is that we have a single set of (contiguous) registers, controlling gates from different parents. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --XZLT0nNRngx3qG4/ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWOjFYAAoJEBx+YmzsjxAgorcP/AtRfQldMElV0ebsF0MpUGQv WwgxunfTWv7MUbhYf77Dq+/w84Xfv0tlXAcAwVO8h1E0FWcVIM+VDJE9hpg01fk2 WYRUmpP3/GaPMra5lOL29RztWc0Aj4+h6gnt/li7XCAtCpR6RsQnwGWL1wxViFHX rmIG9VbVDYQ1oIPWnXvyGjm9IC6NGoBwsyfaVnXjOUiX7dlREDMEsNKY2VRHdgil eN7x8M9Fm4WTZLkuDvdnapMPQAeI1a/4A1kgjoxmM2dG5n0OlXYaCuDMMy4oX6xm n2zDMxigrZ509G3jYNBk3O4UvB8gi/ptcxpM9xG4nt5lmyDgfKBw12VAjHzhRm0m VeN0k3b4ZDZYiSLIiyQHpuvF7MUpLORMpAgvFCZzRC9qzI/ZT954zuqJFVpIAV62 GYQad12qEfAYaWDxClT4mzsEtwtHAuXuFtuwzcCop1Oys6rSHYiLqwhGZJExadRE Wziavf+h+n8sfpUCVfMrVqSb59Lt4tu0WU9/LcDmcE/1i4ympFkz6xl+XWD41EM8 mpryj+n1zvk9Ic0dKYHimJLgaOhydb6hm/HGDMK8zPzTSQhQN6JG2XvW41Be0v/n jAXvP6UnqiVS61kHYCC7RF4BaadN8JQXT6jIECHwfUUujvjB0edl9l/gzVKhqMDa majssExhlUvULpkMLeHP =+Zko -----END PGP SIGNATURE----- --XZLT0nNRngx3qG4/--