From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030537AbbKDRTm (ORCPT ); Wed, 4 Nov 2015 12:19:42 -0500 Received: from down.free-electrons.com ([37.187.137.238]:33203 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751231AbbKDRTk (ORCPT ); Wed, 4 Nov 2015 12:19:40 -0500 Date: Wed, 4 Nov 2015 08:30:14 -0800 From: Maxime Ripard To: Arnd Bergmann Cc: linux-arm-kernel@lists.infradead.org, Jens Kuske , Chen-Yu Tsai , Michael Turquette , Linus Walleij , Rob Herring , Philipp Zabel , Emilio =?iso-8859-1?Q?L=F3pez?= , devicetree@vger.kernel.org, Vishnu Patekar , linux-kernel@vger.kernel.org, Hans de Goede , linux-sunxi@googlegroups.com Subject: Re: [PATCH v4 4/6] reset: sunxi: Add Allwinner H3 bus resets Message-ID: <20151104163014.GB6114@lukather> References: <1445964626-6484-1-git-send-email-jenskuske@gmail.com> <1445964626-6484-5-git-send-email-jenskuske@gmail.com> <13919923.o3Dj9msmoa@wuerfel> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="abYdCjSRCBwcb+dP" Content-Disposition: inline In-Reply-To: <13919923.o3Dj9msmoa@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --abYdCjSRCBwcb+dP Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Arnd, On Fri, Oct 30, 2015 at 09:27:03AM +0100, Arnd Bergmann wrote: > On Tuesday 27 October 2015 17:50:24 Jens Kuske wrote: > >=20 > > +static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev, > > + const struct of_phandle_args *reset= _spec) > > +{ > > + unsigned int index =3D reset_spec->args[0]; > > + > > + if (index < 96) > > + return index; > > + else if (index < 128) > > + return index + 32; > > + else if (index < 160) > > + return index + 64; > > + else > > + return -EINVAL; > > +} > > + > >=20 >=20 > This looks like you are doing something wrong and should either > put the actual number into DT, This is the actual number, except that there's some useless registers in between. Allwinner documents it like that: 0x0 Reset 0 0x4 Reset 1 0xc Reset 2 So we have to adjust the offset to account with the blank register in between (0x8). > or use a two-cell representation, with the first cell indicating the > block (0, 1 or 2), and the second cell the index. And the missing register is not a block either. That would also imply either changing the bindings of that driver (and all the current DTS that are using it), or introducing a whole new driver just to deal with some extraordinary offset calculation. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --abYdCjSRCBwcb+dP Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWOjKWAAoJEBx+YmzsjxAgAX8QAJdexjGJs3GfowZ4QpNyEXqo 3Qsn10idOy9K6fiIvv5pim8Kn3EbShjF0oh2rwHFiGX86XWG5ZY0DvscxVmOweKd l4eNiHtFmO7jlaOojju+rwm9H/CD7wYJNtQKYCDmBXhDpiV6q6lJKJMIgLpxWYnf vuFQRWKFtCtY7cma/aIoltGISDcrI5gcBcjNbIQOAtoKx5CzRKY5fYKkjBpVVURb jba2Q2DtiNS17mFClpi5bO8xbRxUL6Hf2pib9Wp7JFjqBe/mMIywyc/Vw1DCBb+J iKYfz+WdFxcy2vzd9a1WSX2fCYqx4xKBQdvujMm7kamz4vFI7AdPOLPB68Fkh0Qe r/WgHtMgUdEtUHSTbociEglwdMvOMbW7AYPnEEzKrpK5FQGxBtzvvAP2DVOYHaTs pnd6shNVnuRkpMJW4q1iYW6KJ+s1gIx4WH5wMW4DZSZEWOIDTtTOwTgILv9CHi6p uAiEOcK5LRiEwXMXR50XcXDYgM6NV+xCDtC8VzFP6NZpn4xnS0TpHJztbJBBmciJ 2y9t7OjcyKKPoI8qRQyqtUPaUzM8fa+JXbhIAkb8E5vj5tNFOlou1Uy6Cx9mRbXw BEx4obFXuHv3GOudLRe1/RLfzIkdFrce2bfcS/cDapGpwrDW/6YRmv9ijEc/+/T1 hSZO+ojjcuuuOYwl+avb =dO3h -----END PGP SIGNATURE----- --abYdCjSRCBwcb+dP--