From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754938AbcAWVL5 (ORCPT ); Sat, 23 Jan 2016 16:11:57 -0500 Received: from mail-pf0-f181.google.com ([209.85.192.181]:35668 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753633AbcAWVLz (ORCPT ); Sat, 23 Jan 2016 16:11:55 -0500 Date: Sat, 23 Jan 2016 13:11:52 -0800 From: Brian Norris To: Yuan Yao Cc: dwmw2@infradead.org, han.xu@freescale.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, yao.yuan@nxp.com Subject: Re: [PATCH v3 1/3] mtd: spi-nor: fsl-quadspi: add big-endian support Message-ID: <20160123211152.GD35559@google.com> References: <1453362836-44377-1-git-send-email-yao.yuan@freescale.com> <1453362836-44377-2-git-send-email-yao.yuan@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1453362836-44377-2-git-send-email-yao.yuan@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 21, 2016 at 03:53:54PM +0800, Yuan Yao wrote: > Add R/W functions for big- or little-endian registers: > The qSPI controller's endian is independent of the CPU core's endian. > So far, the qSPI have two versions for big-endian and little-endian. > > Signed-off-by: Yuan Yao > Acked-by: Han xu > --- ... > @@ -954,6 +990,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > if (IS_ERR(q->iobase)) > return PTR_ERR(q->iobase); > > + q->big_endian = of_property_read_bool(np, "big-endian"); > res = platform_get_resource_byname(pdev, IORESOURCE_MEM, > "QuadSPI-memory"); > if (!devm_request_mem_region(dev, res->start, resource_size(res), Still no documentation for this property?? You're trying my patience. We've had the same request since November, and you haven't managed to satisfy it.