From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756283AbcA3AbF (ORCPT ); Fri, 29 Jan 2016 19:31:05 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:36101 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753793AbcA3AbD (ORCPT ); Fri, 29 Jan 2016 19:31:03 -0500 Date: Fri, 29 Jan 2016 16:31:00 -0800 From: Stephen Boyd To: Shawn Lin Cc: Heiko Stuebner , Michael Turquette , linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Xing Zheng , Jeffy Chen Subject: Re: [PATCH] clk: rockchip: fix wrong mmc phase shift for rk3228 Message-ID: <20160130003100.GB12841@codeaurora.org> References: <1453779018-30666-1-git-send-email-shawn.lin@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1453779018-30666-1-git-send-email-shawn.lin@rock-chips.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/26, Shawn Lin wrote: > mmc sample shift is 0 for rk3228 refer to user manaul. > So it's broken if we enable mmc tuning for rk3228. > > Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") > Cc: Xing Zheng > Cc: Jeffy Chen > Signed-off-by: Shawn Lin > --- Acked-by: Stephen Boyd -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project