From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754108AbcBPHur (ORCPT ); Tue, 16 Feb 2016 02:50:47 -0500 Received: from mail-wm0-f45.google.com ([74.125.82.45]:32915 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753807AbcBPHup (ORCPT ); Tue, 16 Feb 2016 02:50:45 -0500 Date: Tue, 16 Feb 2016 08:50:41 +0100 From: Ingo Molnar To: Borislav Petkov Cc: Paolo Bonzini , Suravee Suthikulpanit , joro@8bytes.org, alex.williamson@redhat.com, gleb@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, wei@redhat.com, sherry.hurwitz@amd.com, x86-ml Subject: Re: [PART1 RFC 6/9] svm: Add interrupt injection via AVIC Message-ID: <20160216075041.GA27440@gmail.com> References: <1455285574-27892-1-git-send-email-suravee.suthikulpanit@amd.com> <1455285574-27892-7-git-send-email-suravee.suthikulpanit@amd.com> <20160212141650.GB4504@pd.tnic> <56BE0043.9050701@amd.com> <20160212171406.GF4099@pd.tnic> <56BE229D.6030206@redhat.com> <20160212183048.GG4099@pd.tnic> <56BE2AFB.4000504@redhat.com> <20160212193353.GH4099@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160212193353.GH4099@pd.tnic> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Borislav Petkov wrote: > On Fri, Feb 12, 2016 at 07:56:59PM +0100, Paolo Bonzini wrote: > > Ok, next examples: MSR_VM_CR and MSR_VM_IGNNE. :) > > I knew you were going to dig out some. :-) > > > Are you okay with moving all the SVM MSRs to virtext.h instead? > > So I would not move any now and cause unnecessary churn. I think it > should be enough if we agree on a strategy wrt msr-index.h and then > follow it. I think we should do something similar to pci_ids.h. > > Let me add tip guys to CC. > > --- > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 552346598dab..75a5bb61d32f 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -1,7 +1,12 @@ > #ifndef _ASM_X86_MSR_INDEX_H > #define _ASM_X86_MSR_INDEX_H > > -/* CPU model specific register (MSR) numbers */ > +/* > + * CPU model specific register (MSR) numbers. > + * > + * Do not add new entries to this file unless the definitions are shared > + * between multiple compilation units. > + */ This sounds good to me. Thanks, Ingo