From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934139AbcCIU4p (ORCPT ); Wed, 9 Mar 2016 15:56:45 -0500 Received: from mail.skyhub.de ([78.46.96.112]:35850 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753522AbcCIU4i (ORCPT ); Wed, 9 Mar 2016 15:56:38 -0500 Date: Wed, 9 Mar 2016 21:56:22 +0100 From: Borislav Petkov To: Andy Lutomirski Cc: Huang Rui , Peter Zijlstra , spg_linux_kernel@amd.com, X86 ML , LKML Subject: [PATCH] x86/delay: Avoid preemptible context checks in delay_mwaitx() Message-ID: <20160309205622.GG6564@pd.tnic> References: <1457523473-3285-1-git-send-email-bp@alien8.de> <20160309181003.GF6564@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160309181003.GF6564@pd.tnic> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We do use this_cpu_ptr(&cpu_tss) as a cacheline-aligned, seldomly accessed per-cpu var as the MONITORX target in delay_mwaitx(). However, when called in preemptible context, this_cpu_ptr -> smp_processor_id() -> debug_smp_processor_id() fires: BUG: using smp_processor_id() in preemptible [00000000] code: udevd/312 caller is delay_mwaitx+0x40/0xa0 But we don't care about that check - we only need cpu_tss as a MONITORX target and it doesn't really matter which CPU's var we're touching as we're going idle anyway. Fix that. Suggested-by: Andy Lutomirski Signed-off-by: Borislav Petkov Cc: Huang Rui Cc: spg_linux_kernel@amd.com --- arch/x86/lib/delay.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c index e912b2f6d36e..2f07c291dcc8 100644 --- a/arch/x86/lib/delay.c +++ b/arch/x86/lib/delay.c @@ -102,7 +102,7 @@ static void delay_mwaitx(unsigned long __loops) * Use cpu_tss as a cacheline-aligned, seldomly * accessed per-cpu variable as the monitor target. */ - __monitorx(this_cpu_ptr(&cpu_tss), 0, 0); + __monitorx(raw_cpu_ptr(&cpu_tss), 0, 0); /* * AMD, like Intel, supports the EAX hint and EAX=0xf -- 2.3.5 -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.