From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753829AbcDFKiK (ORCPT ); Wed, 6 Apr 2016 06:38:10 -0400 Received: from lxorguk.ukuu.org.uk ([81.2.110.251]:55898 "EHLO lxorguk.ukuu.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750953AbcDFKiJ (ORCPT ); Wed, 6 Apr 2016 06:38:09 -0400 Date: Wed, 6 Apr 2016 11:37:37 +0100 From: One Thousand Gnomes To: Borislav Petkov Cc: zengzhaoxiu@163.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, dvlasenk@redhat.com, akpm@linux-foundation.org, dvyukov@google.com, keescook@chromium.org, linux-kernel@vger.kernel.org, Zhaoxiu Zeng Subject: Re: [PATCH v2 10/30] Add x86-specific parity functions Message-ID: <20160406113737.0b73bb40@lxorguk.ukuu.org.uk> In-Reply-To: <20160406101300.GA13719@pd.tnic> References: <57031D9D.801@gmail.com> <1459934085-7152-1-git-send-email-zengzhaoxiu@163.com> <20160406101300.GA13719@pd.tnic> Organization: Intel Corporation X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.29; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 6 Apr 2016 12:13:00 +0200 Borislav Petkov wrote: > On Wed, Apr 06, 2016 at 05:14:45PM +0800, zengzhaoxiu@163.com wrote: > > From: Zhaoxiu Zeng > > > > Use alternatives, lifted from arch_hweight > > > > Signed-off-by: Zhaoxiu Zeng > > --- > > arch/x86/include/asm/arch_hweight.h | 5 ++ > > arch/x86/include/asm/arch_parity.h | 102 ++++++++++++++++++++++++++++++++++++ > > arch/x86/include/asm/bitops.h | 4 +- > > arch/x86/lib/Makefile | 8 +++ > > arch/x86/lib/parity.c | 32 ++++++++++++ > > 5 files changed, 150 insertions(+), 1 deletion(-) > > create mode 100644 arch/x86/include/asm/arch_parity.h > > create mode 100644 arch/x86/lib/parity.c > > ... > > > +static __always_inline unsigned int __arch_parity32(unsigned int w) > > +{ > > + unsigned int res; > > + > > + asm(ALTERNATIVE("call __sw_parity32", POPCNT32 "; and $1, %0", X86_FEATURE_POPCNT) > > + : "="REG_OUT (res) > > + : REG_IN (w) > > + : "cc"); > > So why all that churn instead of simply doing: > > static __always_inline unsigned int __arch_parity32(unsigned int w) > { > return hweight32(w) & 1; > } > > Ditto for the 64-bit version. Even that would still be wrong for the smaller parity values. The CPU supports 8bit parity directly going back to the 8086 so the implementation for 8bit and I think 16bit is still wrong. Alan