> The default frequency rate of function clock is 50M Hz, it can match
> F/S mode, but HS mode not. If use default rate 50M to get 1.7M
> scl-frequency rate , we could not get accurately 1.7M frequecy rate.
> The input-clk-rate is more higher, we get more accurately
> scl-frequency rate,  as 200M is a suitable input-clk-rate.
> 
> If 200M was used for F/S mode, it would increase power consumption, so
> add a option that could be configured from DT.

If I understand you correctly, couldn't you use clk_set_rate() depending
on the desired scl frequency which is already described in DT as
clock-frequency?