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From: Mike Travis <travis@sgi.com>
To: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Andrew Morton <akpm@linux-foundation.org>,
	Len Brown <len.brown@intel.com>,
	Dimitri Sivanich <sivanich@sgi.com>
Cc: Russ Anderson <rja@sgi.com>, John Estabrook <estabrook@sgi.com>,
	Andrew Banman <abanman@sgi.com>, Nathan Zimmer <nzimmer@sgi.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs
Date: Thu, 28 Apr 2016 18:10:41 -0500	[thread overview]
Message-ID: <20160428231033.275809589@asylum.americas.sgi.com> (raw)
In-Reply-To: 20160428231031.265120287@asylum.americas.sgi.com

[-- Attachment #1: uv4_add_per_cpu_info --]
[-- Type: text/plain, Size: 3462 bytes --]

The major portion of the hub info is common to all cpus on that hub.
This is step one of moving the per cpu hub info to a per node hub info
struct.  This patch creates the small per cpu info struct that will
contain only information specific to each CPU.

Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Tested-by: John Estabrook <estabrook@sgi.com>
Tested-by: Gary Kroening <gfk@sgi.com>
Tested-by: Nathan Zimmer <nzimmer@sgi.com>
---
 arch/x86/include/asm/uv/uv_hub.h   |   19 +++++++++++++++----
 arch/x86/kernel/apic/x2apic_uv_x.c |   15 ++++++++++-----
 2 files changed, 25 insertions(+), 9 deletions(-)

--- linux.orig/arch/x86/include/asm/uv/uv_hub.h
+++ linux/arch/x86/include/asm/uv/uv_hub.h
@@ -139,8 +139,9 @@ struct uv_scir_s {
 
 /*
  * The following defines attributes of the HUB chip. These attributes are
- * frequently referenced and are kept in the per-cpu data areas of each cpu.
- * They are kept together in a struct to minimize cache misses.
+ * frequently referenced and are kept in a common per hub struct.
+ * After setup, the struct is read only, so it should be readily
+ * available in the L3 cache on the cpu socket for the node.
  */
 struct uv_hub_info_s {
 	unsigned long		global_mmr_base;
@@ -167,9 +168,19 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __
 #define uv_hub_info		this_cpu_ptr(&__uv_hub_info)
 #define uv_cpu_hub_info(cpu)	(&per_cpu(__uv_hub_info, cpu))
 
+/* CPU specific info with a pointer to the hub common info struct */
+struct uv_cpu_info_s {
+	void			*p_uv_hub_info;
+	unsigned char		blade_cpu_id;
+	struct uv_scir_s	scir;
+};
+DECLARE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
+
+#define uv_cpu_info		this_cpu_ptr(&__uv_cpu_info)
+#define uv_cpu_info_per(cpu)	(&per_cpu(__uv_cpu_info, cpu))
+
 /*
- * Hub revisions less than UV2_HUB_REVISION_BASE are UV1 hubs. All UV2
- * hubs have revision numbers greater than or equal to UV2_HUB_REVISION_BASE.
+ * HUB revision ranges for each UV HUB architecture.
  * This is a software convention - NOT the hardware revision numbers in
  * the hub chip.
  */
--- linux.orig/arch/x86/kernel/apic/x2apic_uv_x.c
+++ linux/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -238,6 +238,9 @@ EXPORT_SYMBOL_GPL(is_uv_system);
 DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
 
+DEFINE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
+EXPORT_PER_CPU_SYMBOL_GPL(__uv_cpu_info);
+
 struct uv_blade_info *uv_blade_info;
 EXPORT_SYMBOL_GPL(uv_blade_info);
 
@@ -1010,11 +1013,10 @@ void __init uv_system_init(void)
 		  hweight64(uv_read_local_mmr( UVH_NODE_PRESENT_TABLE + i * 8));
 
 	/* uv_num_possible_blades() is really the hub count */
-	pr_info("UV: Found %d blades, %d hubs\n",
-			is_uv1_hub() ?
-				uv_num_possible_blades() :
-				(uv_num_possible_blades() + 1) / 2,
-			uv_num_possible_blades());
+	pr_info("UV: Found %d hubs, %d nodes, %d cpus\n",
+			uv_num_possible_blades(),
+			num_possible_nodes(),
+			num_possible_cpus());
 
 	bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
 	uv_blade_info = kzalloc(bytes, GFP_KERNEL);
@@ -1077,6 +1079,9 @@ void __init uv_system_init(void)
 		uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
 		uv_node_to_blade[nodeid] = blade;
 		uv_cpu_to_blade[cpu] = blade;
+
+		/* Initialize per cpu info list */
+		uv_cpu_info_per(cpu)->p_uv_hub_info = uv_cpu_hub_info(cpu);
 	}
 
 	/* Add blade/pnode info for nodes without cpus */

-- 

  parent reply	other threads:[~2016-04-28 23:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 23:10 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-28 23:10 ` [PATCH 01/21] X86_64, UV: Add Initial UV4 definitions Mike Travis
2016-04-28 23:10 ` [PATCH 02/21] X86_64, UV: Add UV Architecture Defines Mike Travis
2016-04-28 23:10 ` [PATCH 03/21] X86_64, UV: Add UV4 Specific Defines Mike Travis
2016-04-28 23:10 ` [PATCH 04/21] X86_64, UV: Add UV MMR Illegal Access Function Mike Travis
2016-04-28 23:10 ` [PATCH 05/21] X86_64, UV: Prep for UV4 MMR updates Mike Travis
2016-04-28 23:10 ` [PATCH 06/21] X86_64, UV: Add UV4 Specific MMR definitions Mike Travis
2016-04-28 23:10 ` [PATCH 07/21] X86_64, UV: Enable/Disable UV1 only workaround code Mike Travis
2016-04-29  7:40   ` Ingo Molnar
2016-04-28 23:10 ` [PATCH 08/21] X86_64, UV: Clean up redunduncies after merge of UV4 MMR definitions Mike Travis
2016-04-28 23:10 ` [PATCH 09/21] X86_64, UV: Update MMIOH setup function to work for both UV3 and UV4 Mike Travis
2016-04-28 23:10 ` Mike Travis [this message]
2016-04-28 23:10 ` [PATCH 11/21] X86_64, UV: Move scir info to the per cpu info struct Mike Travis
2016-04-28 23:10 ` [PATCH 12/21] X86_64, UV: Move blade local processor ID " Mike Travis
2016-04-28 23:10 ` [PATCH 13/21] X86_64, UV: Allocate common per node hub info structs on local node Mike Travis
2016-04-28 23:10 ` [PATCH 14/21] X86_64, UV: Fold blade info into per node hub info structs Mike Travis
2016-04-28 23:10 ` [PATCH 15/21] X86_64, UV: Add UV4 addressing discovery function Mike Travis
2016-04-28 23:10 ` [PATCH 16/21] X86_64, UV: Add obtaining GAM Range Table from UV BIOS Mike Travis
2016-04-28 23:10 ` [PATCH 17/21] X86_64, UV: Support UV4 socket address changes Mike Travis
2016-04-28 23:10 ` [PATCH 18/21] X86_64, UV: Build GAM reference tables Mike Travis
2016-04-28 23:10 ` [PATCH 19/21] X86_64, UV: Update physical address conversions for UV4 Mike Travis
2016-04-28 23:10 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-04-28 23:10 ` [PATCH 21/21] X86_64, UV: Fix incorrect nodes and pnodes for cpuless and memoryless nodes Mike Travis
  -- strict thread matches above, loose matches on Subject: below --
2016-04-29 21:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-29 21:54 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis
2016-04-28  0:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-28  0:55 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis

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