From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753013AbcEYKZV (ORCPT ); Wed, 25 May 2016 06:25:21 -0400 Received: from foss.arm.com ([217.140.101.70]:33768 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750745AbcEYKZT (ORCPT ); Wed, 25 May 2016 06:25:19 -0400 Date: Wed, 25 May 2016 11:25:04 +0100 From: Mark Rutland To: Rich Felker Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Ian Campbell , Jason Cooper , Kumar Gala , Marc Zyngier , Pawel Moll , Rob Herring , Thomas Gleixner Subject: Re: [PATCH v3 03/12] of: add J-Core interrupt controller bindings Message-ID: <20160525102503.GG1337@leverpostej> References: <03e22cb9679aa7d45f07dba0bf6610ec824cae11.1464148904.git.dalias@libc.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <03e22cb9679aa7d45f07dba0bf6610ec824cae11.1464148904.git.dalias@libc.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 25, 2016 at 05:43:03AM +0000, Rich Felker wrote: > Signed-off-by: Rich Felker > --- > .../bindings/interrupt-controller/jcore,aic.txt | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > new file mode 100644 > index 0000000..5dc99b9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > @@ -0,0 +1,29 @@ > +J-Core Advanced Interrupt Controller > + > +Required properties: > + > +- compatible : Should be "jcore,aic1" for the (obsolete) first-generation aic > + with 8 interrupt lines with programmable priorities, or "jcore,aic2" for > + the "aic2" core with 64 interrupts. > + > +- reg : Memory region for configuration. > + > +- interrupt-controller : Identifies the node as an interrupt controller > + > +- #interrupt-cells : Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. > + > +Optional properties: > + > +- cpu-offset : For SMP, the offset to the per-cpu memory region for > + configuration, to be scaled by the cpu number. I take is that "cpu number" means the "sequential, zero-based hardware cpu id" defined in patch 2. I would recommend that you explicitly mention that (e.g. here say "hardware cpu id" rather than "cpu number"), so as to not have this confused with Linux logical IDs. Thanks, Mark. > + > + > +Example: > + > +aic: interrupt-controller@200 { > + compatible = "jcore,aic2"; > + reg = < 0x200 0x10 >; > + interrupt-controller; > + #interrupt-cells = <1>; > +}; > -- > 2.8.1 > >