From: Stephen Boyd <stephen.boyd@linaro.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Kelvin Cheung <keguang.zhang@gmail.com>
Subject: [PATCH 16/34] clk: ls1x: Migrate to clk_hw based OF and registration APIs
Date: Wed, 1 Jun 2016 16:15:15 -0700 [thread overview]
Message-ID: <20160601231533.9354-17-stephen.boyd@linaro.org> (raw)
In-Reply-To: <20160601231533.9354-1-stephen.boyd@linaro.org>
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
See commit 58657d189a2f and it's children for details on this
new registration API.
drivers/clk/clk-ls1x.c | 69 +++++++++++++++++++++++++-------------------------
1 file changed, 35 insertions(+), 34 deletions(-)
diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c
index 5097831387ff..c1cc427d2b78 100644
--- a/drivers/clk/clk-ls1x.c
+++ b/drivers/clk/clk-ls1x.c
@@ -48,13 +48,13 @@ static const struct clk_ops ls1x_pll_clk_ops = {
.recalc_rate = ls1x_pll_recalc_rate,
};
-static struct clk *__init clk_register_pll(struct device *dev,
- const char *name,
- const char *parent_name,
- unsigned long flags)
+static struct clk_hw *__init clk_hw_register_pll(struct device *dev,
+ const char *name,
+ const char *parent_name,
+ unsigned long flags)
{
+ int ret;
struct clk_hw *hw;
- struct clk *clk;
struct clk_init_data init;
/* allocate the divider */
@@ -72,12 +72,13 @@ static struct clk *__init clk_register_pll(struct device *dev,
hw->init = &init;
/* register the clock */
- clk = clk_register(dev, hw);
-
- if (IS_ERR(clk))
+ ret = clk_hw_register(dev, hw);
+ if (ret) {
kfree(hw);
+ hw = ERR_PTR(ret);
+ }
- return clk;
+ return hw;
}
static const char * const cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", };
@@ -86,14 +87,14 @@ static const char * const dc_parents[] = { "dc_clk_div", "osc_33m_clk", };
void __init ls1x_clk_init(void)
{
- struct clk *clk;
+ struct clk_hw *hw;
- clk = clk_register_fixed_rate(NULL, "osc_33m_clk", NULL, 0, OSC);
- clk_register_clkdev(clk, "osc_33m_clk", NULL);
+ hw = clk_hw_register_fixed_rate(NULL, "osc_33m_clk", NULL, 0, OSC);
+ clk_hw_register_clkdev(clk, "osc_33m_clk", NULL);
/* clock derived from 33 MHz OSC clk */
- clk = clk_register_pll(NULL, "pll_clk", "osc_33m_clk", 0);
- clk_register_clkdev(clk, "pll_clk", NULL);
+ hw = clk_hw_register_pll(NULL, "pll_clk", "osc_33m_clk", 0);
+ clk_hw_register_clkdev(hw, "pll_clk", NULL);
/* clock derived from PLL clk */
/* _____
@@ -102,17 +103,17 @@ void __init ls1x_clk_init(void)
* \___ PLL ___ CPU DIV ___| |
* |_____|
*/
- clk = clk_register_divider(NULL, "cpu_clk_div", "pll_clk",
+ hw = clk_hw_register_divider(NULL, "cpu_clk_div", "pll_clk",
CLK_GET_RATE_NOCACHE, LS1X_CLK_PLL_DIV,
DIV_CPU_SHIFT, DIV_CPU_WIDTH,
CLK_DIVIDER_ONE_BASED |
CLK_DIVIDER_ROUND_CLOSEST, &_lock);
- clk_register_clkdev(clk, "cpu_clk_div", NULL);
- clk = clk_register_mux(NULL, "cpu_clk", cpu_parents,
+ clk_hw_register_clkdev(hw, "cpu_clk_div", NULL);
+ hw = clk_hw_register_mux(NULL, "cpu_clk", cpu_parents,
ARRAY_SIZE(cpu_parents),
CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
BYPASS_CPU_SHIFT, BYPASS_CPU_WIDTH, 0, &_lock);
- clk_register_clkdev(clk, "cpu_clk", NULL);
+ clk_hw_register_clkdev(hw, "cpu_clk", NULL);
/* _____
* _______________________| |
@@ -120,15 +121,15 @@ void __init ls1x_clk_init(void)
* \___ PLL ___ DC DIV ___| |
* |_____|
*/
- clk = clk_register_divider(NULL, "dc_clk_div", "pll_clk",
+ hw = clk_hw_register_divider(NULL, "dc_clk_div", "pll_clk",
0, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT,
DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_register_clkdev(clk, "dc_clk_div", NULL);
- clk = clk_register_mux(NULL, "dc_clk", dc_parents,
+ clk_hw_register_clkdev(hw, "dc_clk_div", NULL);
+ hw = clk_hw_register_mux(NULL, "dc_clk", dc_parents,
ARRAY_SIZE(dc_parents),
CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
BYPASS_DC_SHIFT, BYPASS_DC_WIDTH, 0, &_lock);
- clk_register_clkdev(clk, "dc_clk", NULL);
+ clk_hw_register_clkdev(hw, "dc_clk", NULL);
/* _____
* _______________________| |
@@ -136,26 +137,26 @@ void __init ls1x_clk_init(void)
* \___ PLL ___ DDR DIV ___| |
* |_____|
*/
- clk = clk_register_divider(NULL, "ahb_clk_div", "pll_clk",
+ hw = clk_hw_register_divider(NULL, "ahb_clk_div", "pll_clk",
0, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT,
DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED,
&_lock);
- clk_register_clkdev(clk, "ahb_clk_div", NULL);
- clk = clk_register_mux(NULL, "ahb_clk", ahb_parents,
+ clk_hw_register_clkdev(hw, "ahb_clk_div", NULL);
+ hw = clk_hw_register_mux(NULL, "ahb_clk", ahb_parents,
ARRAY_SIZE(ahb_parents),
CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
BYPASS_DDR_SHIFT, BYPASS_DDR_WIDTH, 0, &_lock);
- clk_register_clkdev(clk, "ahb_clk", NULL);
- clk_register_clkdev(clk, "stmmaceth", NULL);
+ clk_hw_register_clkdev(hw, "ahb_clk", NULL);
+ clk_hw_register_clkdev(hw, "stmmaceth", NULL);
/* clock derived from AHB clk */
/* APB clk is always half of the AHB clk */
- clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,
+ hw = clk_hw_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,
DIV_APB);
- clk_register_clkdev(clk, "apb_clk", NULL);
- clk_register_clkdev(clk, "ls1x_i2c", NULL);
- clk_register_clkdev(clk, "ls1x_pwmtimer", NULL);
- clk_register_clkdev(clk, "ls1x_spi", NULL);
- clk_register_clkdev(clk, "ls1x_wdt", NULL);
- clk_register_clkdev(clk, "serial8250", NULL);
+ clk_hw_register_clkdev(hw, "apb_clk", NULL);
+ clk_hw_register_clkdev(hw, "ls1x_i2c", NULL);
+ clk_hw_register_clkdev(hw, "ls1x_pwmtimer", NULL);
+ clk_hw_register_clkdev(hw, "ls1x_spi", NULL);
+ clk_hw_register_clkdev(hw, "ls1x_wdt", NULL);
+ clk_hw_register_clkdev(hw, "serial8250", NULL);
}
--
2.7.4
next prev parent reply other threads:[~2016-06-01 23:16 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-01 23:14 [PATCH 00/34] Convert clk providers to clk_hw based APIs (part 1) Stephen Boyd
2016-06-01 23:15 ` [PATCH 01/34] clk: qcom: Migrate to clk_hw based registration and OF APIs Stephen Boyd
2016-06-01 23:15 ` [PATCH 02/34] clk: at91: " Stephen Boyd
2016-06-07 16:36 ` Alexandre Belloni
2016-06-07 16:40 ` Boris Brezillon
2016-09-15 0:39 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 03/34] clk: highbank: " Stephen Boyd
2016-06-02 1:02 ` Rob Herring
2016-06-30 19:25 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 04/34] clk: bcm2835: " Stephen Boyd
2016-06-02 18:25 ` Eric Anholt
2016-09-15 0:36 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 05/34] clk: bcm: iproc: " Stephen Boyd
2016-06-02 17:22 ` Ray Jui
2016-06-30 19:27 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 06/34] clk: bcm: kona: " Stephen Boyd
2016-08-24 23:08 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 07/34] clk: berlin: " Stephen Boyd
2016-06-05 17:41 ` Alexandre Belloni
[not found] ` <146528884761.28742.8093002152658120585@sboyd-linaro>
2016-06-07 16:33 ` Alexandre Belloni
2016-06-01 23:15 ` [PATCH 08/34] clk: asm9260: " Stephen Boyd
2016-08-24 23:09 ` Stephen Boyd
2016-08-24 23:10 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 09/34] clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs Stephen Boyd
2016-08-24 23:11 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 10/34] clk: axm5516: " Stephen Boyd
2016-08-24 23:12 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 11/34] clk: cdce: " Stephen Boyd
2016-08-24 23:13 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 12/34] clk: cdce925: Migrate to clk_hw based OF and provider APIs Stephen Boyd
2016-08-25 0:19 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 13/34] clk: clps711x: Migrate to clk_hw based OF and registration APIs Stephen Boyd
2016-08-25 0:20 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 14/34] clk: cs2000: " Stephen Boyd
2016-08-25 0:21 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 15/34] clk: efm32gg: " Stephen Boyd
2016-08-25 0:22 ` Stephen Boyd
2016-06-01 23:15 ` Stephen Boyd [this message]
2016-08-19 0:09 ` [PATCH 16/34] clk: ls1x: " Stephen Boyd
2016-06-01 23:15 ` [PATCH 17/34] clk: maxgen: " Stephen Boyd
2016-06-07 18:50 ` Javier Martinez Canillas
2016-06-07 18:55 ` Javier Martinez Canillas
2016-08-16 20:06 ` Stephen Boyd
2016-08-17 3:00 ` Javier Martinez Canillas
2016-06-01 23:15 ` [PATCH 18/34] clk: mb86s7x: " Stephen Boyd
2016-08-25 0:27 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 19/34] clk: moxart: " Stephen Boyd
2016-08-25 0:25 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 20/34] clk: nomadik: " Stephen Boyd
2016-06-02 12:06 ` Linus Walleij
2016-06-30 19:26 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 21/34] clk: nspire: " Stephen Boyd
2016-08-25 0:25 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 22/34] clk: palmas: " Stephen Boyd
2016-08-25 0:25 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 23/34] clk: pwm: " Stephen Boyd
2016-08-25 0:25 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 24/34] clk: rk808: " Stephen Boyd
2016-08-25 0:30 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 25/34] clk: s2mps11: " Stephen Boyd
2016-06-03 7:18 ` Krzysztof Kozlowski
2016-06-08 7:22 ` Andi Shyti
2016-06-30 19:29 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 26/34] clk: scpi: " Stephen Boyd
2016-08-25 0:30 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 27/34] clk: si514: " Stephen Boyd
2016-08-25 0:30 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 28/34] clk: si5351: " Stephen Boyd
2016-08-25 0:30 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 29/34] clk: si570: " Stephen Boyd
2016-08-25 0:30 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 30/34] clk: stm32f3: " Stephen Boyd
2016-06-06 13:48 ` Daniel Thompson
2016-06-07 8:37 ` Stephen Boyd
2016-06-30 19:28 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 31/34] clk: twl6040: Migrate to clk_hw based " Stephen Boyd
2016-08-25 0:34 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 32/34] clk: u300: " Stephen Boyd
2016-06-02 12:06 ` Linus Walleij
2016-06-30 19:26 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 33/34] clk: vt8500: " Stephen Boyd
2016-08-25 0:36 ` Stephen Boyd
2016-06-01 23:15 ` [PATCH 34/34] clk: wm831x: " Stephen Boyd
2016-08-25 0:36 ` Stephen Boyd
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