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From: Rob Herring <robh@kernel.org>
To: Douglas Anderson <dianders@chromium.org>
Cc: ulf.hansson@linaro.org, kishon@ti.com,
	Heiko Stuebner <heiko@sntech.de>,
	shawn.lin@rock-chips.com, xzy.xu@rock-chips.com,
	briannorris@chromium.org, adrian.hunter@intel.com,
	linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org,
	devicetree@vger.kernel.org, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock
Date: Fri, 10 Jun 2016 08:36:31 -0500	[thread overview]
Message-ID: <20160610133631.GA10634@rob-hp-laptop> (raw)
In-Reply-To: <1465339484-969-9-git-send-email-dianders@chromium.org>

On Tue, Jun 07, 2016 at 03:44:41PM -0700, Douglas Anderson wrote:
> As of an earlier change in this series ("Documentation: mmc:
> sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
> used on Rockchip SoCs can now expose its clock.  Let's now specify that
> the PHY can use it.
> 
> Letting the PHY get access to this clock means it can adjust
> phyctrl_frqsel field appropriately.  Although the Rockchip PHY appears
> slightly different than the reference Arasan one, you can see that the
> Arasan datasheet [1] had it defined as:
>   Select the frequency range of DLL operation:
>   3b'000 => 200MHz to 170 MHz
>   3b'001 => 170MHz to 140 MHz
>   3b'010 => 140MHz to 110 MHz
>   3b'011 => 110MHz to 80MHz
>   3b'100 => 80MHz to 50 MHz
>   3b'101 => 275Mhz to 250MHz
>   3b'110 => 250MHz to 225MHz
>   3b'111 => 225MHz to 200MHz
> 
> On the Rockchip version of the PHY we have less granularity but the idea
> is the same.
> 
> [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
> 
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
>  Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> index 555cb0f40690..fd118b071e5e 100644
> --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> @@ -7,6 +7,11 @@ Required properties:
>   - reg: PHY register address offset and length in "general
>     register files"
>  
> +Optional clocks (see ../clock/clock-bindings.txt), specified by name:
> + - emmcclk: The card clock exported by the SDHCI driver.  Although this is

This reads like emmcclk is the property. You need to list out clocks and 
clock-names.

> +	    listed as optional (because most boards can get basic functionality
> +	    without having access to it), it is strongly suggested.
> +
>  Example:
>  
>  
> @@ -20,6 +25,8 @@ grf: syscon@ff770000 {
>  	emmcphy: phy@f780 {
>  		compatible = "rockchip,rk3399-emmc-phy";
>  		reg = <0xf780 0x20>;
> +		clocks = <&sdhci>;
> +		clock-names = "emmcclk";
>  		#phy-cells = <0>;
>  	};
>  };
> -- 
> 2.8.0.rc3.226.g39d4020
> 

  reply	other threads:[~2016-06-10 13:36 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-07 22:44 [PATCH 0/11] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson
2016-06-07 22:44 ` [PATCH 01/11] phy: rockchip-emmc: Increase lock time allowance Douglas Anderson
2016-06-13  7:58   ` Shawn Lin
2016-06-13 23:07     ` Doug Anderson
2016-06-07 22:44 ` [PATCH 02/11] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson
2016-06-13  8:08   ` Shawn Lin
2016-06-13 23:06     ` Doug Anderson
2016-06-07 22:44 ` [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson
2016-06-08 20:17   ` Rob Herring
2016-06-13  8:18   ` Shawn Lin
2016-06-13  9:32     ` Heiko Stübner
2016-06-13 23:07     ` Doug Anderson
2016-06-07 22:44 ` [PATCH 04/11] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 Douglas Anderson
2016-06-13  8:36   ` Shawn Lin
2016-06-13 23:06     ` Doug Anderson
2016-06-14  0:14       ` Shawn Lin
2016-06-14  0:43         ` Doug Anderson
2016-06-14  0:59           ` Shawn Lin
2016-06-14  2:13             ` Doug Anderson
2016-06-16  1:06               ` Shawn Lin
2016-06-07 22:44 ` [PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson
2016-06-07 22:44 ` [PATCH 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson
2016-06-08 20:19   ` Rob Herring
2016-06-08 20:52     ` Doug Anderson
2016-06-10 13:10       ` Rob Herring
2016-06-13 23:05         ` Doug Anderson
2016-06-07 22:44 ` [PATCH 07/11] " Douglas Anderson
2016-06-07 22:44 ` [PATCH 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported " Douglas Anderson
2016-06-10 13:36   ` Rob Herring [this message]
2016-06-13 23:05     ` Doug Anderson
2016-06-07 22:44 ` [PATCH 09/11] phy: rockchip-emmc: Set phyctrl_frqsel based on " Douglas Anderson
2016-06-13  8:54   ` Shawn Lin
2016-06-13 23:05     ` Doug Anderson
2016-06-14  0:24       ` Shawn Lin
2016-06-14  0:45         ` Doug Anderson
2016-06-07 22:44 ` [PATCH 10/11] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_off() Douglas Anderson
2016-06-13  8:56   ` Shawn Lin
2016-06-13 23:05     ` Doug Anderson
2016-06-07 22:44 ` [PATCH 11/11] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 Douglas Anderson

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