From: Shawn Guo <shawnguo@kernel.org>
To: Dong Aisheng <aisheng.dong@nxp.com>
Cc: linux-clk@vger.kernel.org, anson.huang@nxp.com,
mturquette@baylibre.com, sboyd@codeaurora.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 05/11] clk: imx: refine the powerup_set bit of clk-pllv3
Date: Sun, 12 Jun 2016 19:36:27 +0800 [thread overview]
Message-ID: <20160612113627.GC20243@tiger> (raw)
In-Reply-To: <1465396420-27064-5-git-send-email-aisheng.dong@nxp.com>
On Wed, Jun 08, 2016 at 10:33:34PM +0800, Dong Aisheng wrote:
> There's a powerdown bit already, so let's change the name of
> powerup_set bit to power_invert to reflects the power polarity
> to make it less confusing.
>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> drivers/clk/imx/clk-pllv3.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
> index eea2b1b3791e..3fdfb6d2cc71 100644
> --- a/drivers/clk/imx/clk-pllv3.c
> +++ b/drivers/clk/imx/clk-pllv3.c
> @@ -29,8 +29,8 @@
> * struct clk_pllv3 - IMX PLL clock version 3
> * @clk_hw: clock source
> * @base: base address of PLL registers
> - * @powerup_set: set POWER bit to power up the PLL
> - * @powerdown: pll powerdown offset bit
> + * @powerdown: pll powerdown bit offset
I think 'powerdown' is more confusing here. I prefer to rename it to
something like 'power_mask' and keep 'powerdown' as it is.
Shawn
> + * @power_invert: set powerdown bit to power up the PLL
> * @div_mask: mask of divider bits
> * @div_shift: shift of divider bits
> *
> @@ -40,7 +40,7 @@
> struct clk_pllv3 {
> struct clk_hw hw;
> void __iomem *base;
> - bool powerup_set;
> + bool power_invert;
> u32 powerdown;
> u32 div_mask;
> u32 div_shift;
> @@ -55,7 +55,7 @@ static int clk_pllv3_wait_lock(struct clk_pllv3 *pll)
> u32 val = readl_relaxed(pll->base) & pll->powerdown;
>
> /* No need to wait for lock when pll is not powered up */
> - if ((pll->powerup_set && !val) || (!pll->powerup_set && val))
> + if ((pll->power_invert && !val) || (!pll->power_invert && val))
> return 0;
>
> /* Wait for PLL to lock */
> @@ -76,7 +76,7 @@ static int clk_pllv3_prepare(struct clk_hw *hw)
> u32 val;
>
> val = readl_relaxed(pll->base);
> - if (pll->powerup_set)
> + if (pll->power_invert)
> val |= pll->powerdown;
> else
> val &= ~pll->powerdown;
> @@ -91,7 +91,7 @@ static void clk_pllv3_unprepare(struct clk_hw *hw)
> u32 val;
>
> val = readl_relaxed(pll->base);
> - if (pll->powerup_set)
> + if (pll->power_invert)
> val &= ~pll->powerdown;
> else
> val |= pll->powerdown;
> @@ -326,7 +326,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
> pll->div_shift = 1;
> case IMX_PLLV3_USB:
> ops = &clk_pllv3_ops;
> - pll->powerup_set = true;
> + pll->power_invert = true;
> break;
> case IMX_PLLV3_AV:
> ops = &clk_pllv3_av_ops;
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2016-06-12 11:37 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 14:33 [PATCH 01/11] clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit Dong Aisheng
2016-06-08 14:33 ` [PATCH 02/11] clk: imx: correct AV PLL rate formula Dong Aisheng
2016-06-12 11:30 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 03/11] clk: imx7d: correct dram root clk parent select Dong Aisheng
2016-06-12 11:31 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 04/11] clk: imx: correct dram pll type Dong Aisheng
2016-06-12 11:33 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 05/11] clk: imx: refine the powerup_set bit of clk-pllv3 Dong Aisheng
2016-06-09 7:43 ` Lothar Waßmann
2016-06-12 11:56 ` Dong Aisheng
2016-06-12 11:36 ` Shawn Guo [this message]
2016-06-12 11:51 ` Dong Aisheng
2016-06-12 12:13 ` Dong Aisheng
2016-06-12 13:29 ` Shawn Guo
2016-06-12 14:51 ` Dong Aisheng
2016-06-13 7:37 ` [PATCH V2 1/1] clk: imx: refine the powerdown " Dong Aisheng
2016-06-13 11:42 ` kbuild test robot
2016-06-13 12:24 ` [PATCH V3 " Dong Aisheng
2016-06-16 1:05 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 06/11] clk: imx6ul: fix gpt2 clock names Dong Aisheng
2016-06-12 11:41 ` Shawn Guo
2016-06-12 11:52 ` Dong Aisheng
2016-06-13 7:38 ` [PATCH V2 1/1] " Dong Aisheng
2016-06-16 1:06 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 07/11] clk: imx6ul: fix pll clock parents Dong Aisheng
2016-06-12 11:43 ` Shawn Guo
2016-06-12 11:52 ` Dong Aisheng
2016-06-12 12:19 ` Dong Aisheng
2016-06-12 13:22 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 08/11] clk: imx6q: " Dong Aisheng
2016-06-08 14:33 ` [PATCH 09/11] clk: imx6sx: " Dong Aisheng
2016-06-08 14:33 ` [PATCH 10/11] clk: imx6sl: " Dong Aisheng
2016-06-08 14:33 ` [PATCH 11/11] clk: imx7d: " Dong Aisheng
2016-06-12 14:56 ` [PATCH 01/11] clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit Dong Aisheng
2016-06-13 2:54 ` Shawn Guo
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