From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754266AbcFPSqh (ORCPT ); Thu, 16 Jun 2016 14:46:37 -0400 Received: from mail-oi0-f65.google.com ([209.85.218.65]:32972 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753919AbcFPSqf (ORCPT ); Thu, 16 Jun 2016 14:46:35 -0400 Date: Thu, 16 Jun 2016 13:46:32 -0500 From: Rob Herring To: Doug Anderson Cc: Shawn Lin , Kishon Vijay Abraham I , "linux-kernel@vger.kernel.org" , "open list:ARM/Rockchip SoC..." , Heiko Stuebner , Wenrui Li , "devicetree@vger.kernel.org" Subject: Re: [PATCH v2 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY Message-ID: <20160616184632.GA1112@rob-hp-laptop> References: <1465865072-25833-1-git-send-email-shawn.lin@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 14, 2016 at 10:27:46AM -0700, Doug Anderson wrote: > Hi, > > On Mon, Jun 13, 2016 at 5:44 PM, Shawn Lin wrote: > > This patch adds a binding that describes the Rockchip PCIe PHY > > found on Rockchip SoCs PCIe interface. > > > > Signed-off-by: Shawn Lin > > > > --- > > > > Changes in v2: > > - add clk and reset description > > - remove unit-address > > > > .../devicetree/bindings/phy/rockchip-pcie-phy.txt | 32 ++++++++++++++++++++++ > > 1 file changed, 32 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt > > new file mode 100644 > > index 0000000..ad55c67 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt > > @@ -0,0 +1,32 @@ > > +Rockchip PCIE PHY > > +----------------------- > > + > > +Required properties: > > + - compatible: rockchip,rk3399-pcie-phy > > + - #phy-cells: must be 0 > > + - clocks: Must contain an entry in clock-names. > > + See ../clocks/clock-bindings.txt for details. > > + - clock-names: Must be "refclk" > > + - resets: Must contain an entry in reset-names. > > + See ../reset/reset.txt for details. > > + - reset-names: Must be "phy" > > + > > +Example: > > + > > +grf: syscon@ff770000 { > > + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + ... > > + > > + pcie-phy: phy { > > Just calling this node "phy" isn't a good idea. There will be > multiple PHYs under the GRF and they can't all have a subnode named > "phy". There's no register range that can be associated with the phy? > > Also: at least in Rockchip device trees usually aliases use > underscores whereas node names use dashes. I'm not actually sure what > the official device tree policy is on this, but it's what I've seen > done. So this should actually be: Labels don't matter as they don't end up in the dtb. Node names should be generic. though we've only defined a small set of generic names. And yes, use '-' not '_'. Rob