From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751721AbcFWSL0 (ORCPT ); Thu, 23 Jun 2016 14:11:26 -0400 Received: from outbound1.eu.mailhop.org ([52.28.251.132]:30915 "EHLO outbound1.eu.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751229AbcFWSLZ (ORCPT ); Thu, 23 Jun 2016 14:11:25 -0400 X-MHO-User: e7c38997-396d-11e6-ac92-3142cfe117f2 X-Report-Abuse-To: https://support.duocircle.com/support/solutions/articles/5000540958-duocircle-standard-smtp-abuse-information X-Originating-IP: 74.99.78.160 X-Mail-Handler: DuoCircle Outbound SMTP X-DKIM: OpenDKIM Filter v2.6.8 io 9224C8002F Date: Thu, 23 Jun 2016 18:11:17 +0000 From: Jason Cooper To: Qais Yousef , g@io.lakedaemon.net Cc: Harvey Hunt , linux-mips@linux-mips.org, Thomas Gleixner , linux-kernel@vger.kernel.org, marc.zyngier@arm.com Subject: Re: [PATCH] irqchip/mips-gic: Fix IRQs in gic_dev_domain Message-ID: <20160623181117.GH9922@io.lakedaemon.net> References: <1464001552-31174-1-git-send-email-harvey.hunt@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Qais, On Tue, May 24, 2016 at 11:43:07AM +0100, Qais Yousef wrote: > Hmm I certainly did test this on real hardware with GIC. Are you using the > new dev domain? The idea is that GIC is logically divided and shouldn't be > used directly. Sorry I'm travelling and can't check the code. Any update on this patch? Should I stop tracking it? thx, Jason. > On 23 May 2016 12:06, "Harvey Hunt" wrote: > > > When allocating a new device IRQ, gic_dev_domain_alloc() correctly calls > > irq_domain_set_hwirq_and_chip(), but gic_irq_domain_alloc() does not. This > > means that gic_irq_domain believes all IRQs from the dev domain have an > > hwirq of 0 and creates incorrect mappings in the linear_revmap. As > > gic_irq_domain is a parent of the gic_dev_domain, this leads to an > > inability to boot on devices with a GIC. Excerpt of the error: > > > > [ 2.297649] irq 0: nobody cared (try booting with the "irqpoll" option) > > ... > > [ 2.436963] handlers: > > [ 2.439492] Disabling IRQ #0 > > > > Fix this by calling irq_domain_set_hwirq_and_chip() for both the dev and > > irq domain. > > > > Now that we are modifying the parent domain, be sure to clear it up in > > case of an allocation error. > > > > Fixes: c98c1822ee13 ("irqchip/mips-gic: Add device hierarchy domain") > > Fixes: 2af70a962070 ("irqchip/mips-gic: Add a IPI hierarchy domain") > > Signed-off-by: Harvey Hunt > > Tested-by: Govindraj Raja # On Pistachio SoC > > Reviewed-by: Matt Redfearn > > Cc: > > Cc: > > Cc: Qais Yousef > > --- > > drivers/irqchip/irq-mips-gic.c | 12 +++++++++++- > > 1 file changed, 11 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/irqchip/irq-mips-gic.c > > b/drivers/irqchip/irq-mips-gic.c > > index 4dffccf..40fb120 100644 > > --- a/drivers/irqchip/irq-mips-gic.c > > +++ b/drivers/irqchip/irq-mips-gic.c > > @@ -734,6 +734,12 @@ static int gic_irq_domain_alloc(struct irq_domain *d, > > unsigned int virq, > > /* verify that it doesn't conflict with an IPI irq */ > > if (test_bit(spec->hwirq, ipi_resrv)) > > return -EBUSY; > > + > > + hwirq = GIC_SHARED_TO_HWIRQ(spec->hwirq); > > + > > + return irq_domain_set_hwirq_and_chip(d, virq, hwirq, > > + > > &gic_level_irq_controller, > > + NULL); > > } else { > > base_hwirq = find_first_bit(ipi_resrv, gic_shared_intrs); > > if (base_hwirq == gic_shared_intrs) { > > @@ -855,10 +861,14 @@ static int gic_dev_domain_alloc(struct irq_domain > > *d, unsigned int virq, > > > > &gic_level_irq_controller, > > NULL); > > if (ret) > > - return ret; > > + goto error; > > } > > > > return 0; > > + > > +error: > > + irq_domain_free_irqs_parent(d, virq, nr_irqs); > > + return ret; > > } > > > > void gic_dev_domain_free(struct irq_domain *d, unsigned int virq, > > -- > > 2.8.2 > > > >