From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751699AbcFXPcZ (ORCPT ); Fri, 24 Jun 2016 11:32:25 -0400 Received: from foss.arm.com ([217.140.101.70]:59165 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751662AbcFXPcW (ORCPT ); Fri, 24 Jun 2016 11:32:22 -0400 Date: Fri, 24 Jun 2016 16:32:17 +0100 From: Catalin Marinas To: Andre Przywara Cc: Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 3/6] arm64: include alternative handling in dcache_by_line_op Message-ID: <20160624153216.GE22608@e104818-lin.cambridge.arm.com> References: <1462812590-4494-1-git-send-email-andre.przywara@arm.com> <1462812590-4494-4-git-send-email-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1462812590-4494-4-git-send-email-andre.przywara@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 09, 2016 at 05:49:47PM +0100, Andre Przywara wrote: > The newly introduced dcache_by_line_op macro is used at least in > one occassion at the moment to issue a "dc cvau" instruction, > which is affected by ARM errata 819472, 826319, 827319 and 824069. > Change the macro to allow for alternative patching in there to > protect affected Cortex-A53 cores. > > Signed-off-by: Andre Przywara > --- > arch/arm64/mm/proc-macros.S | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/mm/proc-macros.S b/arch/arm64/mm/proc-macros.S > index e6a30e1..5786017 100644 > --- a/arch/arm64/mm/proc-macros.S > +++ b/arch/arm64/mm/proc-macros.S > @@ -78,7 +78,14 @@ > add \size, \kaddr, \size > sub \tmp2, \tmp1, #1 > bic \kaddr, \kaddr, \tmp2 > -9998: dc \op, \kaddr > +9998: > + alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE, (\op == cvau || \op == cvac) > + dc \op, \kaddr > + .if (\op == cvau || \op == cvac) > + alternative_else > + dc civac, \kaddr > + alternative_endif > + .endif We can revert commit 77ee306c0aea ("arm64: alternatives: add enable parameter to conditional asm macros"), drop the first patch in this series and move the .if outside the alternative block (with a duplication of the "dc \op, \kaddr" line. -- Catalin