From: Borislav Petkov <bp@suse.de>
To: Ingo Molnar <mingo@kernel.org>
Cc: "Luck, Tony" <tony.luck@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
"Anvin, H Peter" <h.peter.anvin@intel.com>,
Ingo Molnar <mingo@elte.hu>,
Stephane Eranian <eranian@google.com>,
Peter Zijlstra <peterz@infradead.org>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v2 2/3] Documentation, ABI: Add a document entry for cache id
Date: Fri, 8 Jul 2016 20:41:10 +0200 [thread overview]
Message-ID: <20160708184110.GD3938@pd.tnic> (raw)
In-Reply-To: <20160708180746.GB4429@gmail.com>
On Fri, Jul 08, 2016 at 08:07:46PM +0200, Ingo Molnar wrote:
> Who can we ... thank for that nonsensical naming? :-/
>
> > E.g. on most Intel cpus you'll typically find "index0" is the L1-data cache,
> > "index1" is the L1-instruction cache, "index3" is the L2-unified cache and
> > "index4" is the L3-unified cache.
>
> Crazy. What was wrong with using 'level' or 'depth'?
It is all there:
$ grep . /sys/devices/system/cpu/cpu0/cache/index?/level
/sys/devices/system/cpu/cpu0/cache/index0/level:1
/sys/devices/system/cpu/cpu0/cache/index1/level:1
/sys/devices/system/cpu/cpu0/cache/index2/level:2
/sys/devices/system/cpu/cpu0/cache/index3/level:3
$ grep . /sys/devices/system/cpu/cpu0/cache/index?/type
/sys/devices/system/cpu/cpu0/cache/index0/type:Data
/sys/devices/system/cpu/cpu0/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu0/cache/index2/type:Unified
/sys/devices/system/cpu/cpu0/cache/index3/type:Unified
for i in /sys/devices/system/cpu/cpu0/cache/index?;
do
l=$(cat $i/level)
t=$(cat $i/type)
printf "L%d-%s\n" $l $t
done
->
L1-Data
L1-Instruction
L2-Unified
L3-Unified
I believe the index naming is simply enumerating the caches...
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
next prev parent reply other threads:[~2016-07-08 18:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-06 22:07 [PATCH v2 0/3] Cache id Fenghua Yu
2016-07-06 22:07 ` [PATCH v2 1/3] cacheinfo: Introduce cache id Fenghua Yu
2016-07-06 22:07 ` [PATCH v2 2/3] Documentation, ABI: Add a document entry for " Fenghua Yu
2016-07-08 8:41 ` Ingo Molnar
2016-07-08 17:06 ` Yu, Fenghua
2016-07-08 17:29 ` Luck, Tony
2016-07-08 18:07 ` Ingo Molnar
2016-07-08 18:41 ` Borislav Petkov [this message]
2016-07-08 18:47 ` Luck, Tony
2016-07-08 18:55 ` Borislav Petkov
2016-07-08 19:34 ` Ingo Molnar
2016-07-09 8:17 ` Borislav Petkov
2016-07-08 18:06 ` Ingo Molnar
2016-07-06 22:07 ` [PATCH v2 3/3] x86, intel_cacheinfo: Enable cache id in x86 Fenghua Yu
2016-07-07 16:21 ` [PATCH v2 0/3] Cache id Borislav Petkov
2016-07-08 3:13 ` Yu, Fenghua
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