From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752000AbcGPW5U (ORCPT ); Sat, 16 Jul 2016 18:57:20 -0400 Received: from mail-oi0-f68.google.com ([209.85.218.68]:36000 "EHLO mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751744AbcGPW5S (ORCPT ); Sat, 16 Jul 2016 18:57:18 -0400 Date: Sat, 16 Jul 2016 17:57:15 -0500 From: Rob Herring To: William Wu Cc: gregkh@linuxfoundation.org, balbi@kernel.org, heiko@sntech.de, linux-rockchip@lists.infradead.org, briannorris@google.com, dianders@google.com, kever.yang@rock-chips.com, huangtao@rock-chips.com, frank.wang@rock-chips.com, eddie.cai@rock-chips.com, John.Youn@synopsys.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, sergei.shtylyov@cogentembedded.com, mark.rutland@arm.com, devicetree@vger.kernel.org Subject: Re: [PATCH v7 3/5] usb: dwc3: make usb2 phy utmi interface configurable in DT Message-ID: <20160716225715.GA27724@rob-hp-laptop> References: <1468486762-21960-1-git-send-email-william.wu@rock-chips.com> <1468486762-21960-4-git-send-email-william.wu@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1468486762-21960-4-git-send-email-william.wu@rock-chips.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 14, 2016 at 04:59:20PM +0800, William Wu wrote: > Add snps,phyif-utmi-width devicetree property to configure > the UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY > interface is a hardware property, and it's platform dependent. > Normally,the PHYIF can be configured during coreconsultant. ^ space > But for some specific USB cores(e.g. rk3399 SoC DWC3), the > default PHYIF configuration value is fault, so we need to > reconfigure it by software. > > And refer to the DWC3 databook, the GUSB2PHYCFG.USBTRDTIM > must be set to the corresponding value according to the > UTMI+ PHY interface. > > Signed-off-by: William Wu > --- > Changes in v7: > - remove quirk and use only one property to configure utmi (Heiko, Rob Herring) > > Changes in v6: > - use '-' instead of '_' in dts (Rob Herring) > > Changes in v5: > - None > > Changes in v4: > - rebase on top of balbi testing/next, remove pdata (balbi) > > Changes in v3: > - None > > Changes in v2: > - add a quirk for phyif_utmi (balbi) > > Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ > drivers/usb/dwc3/core.c | 25 +++++++++++++++++++++++++ > drivers/usb/dwc3/core.h | 10 ++++++++++ > 3 files changed, 38 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt > index 020b0e9..00cc541 100644 > --- a/Documentation/devicetree/bindings/usb/dwc3.txt > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt > @@ -47,6 +47,9 @@ Optional properties: > - snps,hird-threshold: HIRD threshold > - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for > UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. > + - snps,phyif-utmi-width: the value to configure the core to support a UTMI+ PHY > + with an 8- or 16-bit interface. Value 8 select 8-bit > + interface, value 16 select 16-bit interface. Is 'phy_type = "utmi_wide"' not the same as 16-bit width? Again, I think this should be common. Rob