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Date: Mon, 18 Jul 2016 12:29:25 -0700
From: Andrew Morton <akpm@linux-foundation.org>
To: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Evgeniy Polyakov <zbr@ioremap.net>, Vignesh R <vigneshr@ti.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Andreas Kemnade <andreas@kemnade.info>,
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        Mark Rutland <mark.rutland@arm.com>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>, Jonathan Corbet <corbet@lwn.net>,
        Tony Lindgren <tony@atomide.com>, NeilBrown <neilb@suse.de>,
        Fabian Frederick <fabf@skynet.be>, linux-kernel@vger.kernel.org,
        letux-kernel@openphoenux.org
Subject: Re: [PATCH] w1:omap_hdq: fix regression
Message-Id: <20160718122925.80d840e96ef9ae0b3e09a655@linux-foundation.org>
In-Reply-To: <9c4ed8a45c6c0f99c5fc41842c4781f37cf5d70a.1468858236.git.hns@goldelico.com>
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On Mon, 18 Jul 2016 18:10:37 +0200 "H. Nikolaus Schaller" <hns@goldelico.com> wrote:

> commit <e93762bbf681> ("w1: masters: omap_hdq: add support for 1-wire mode")
> did add a statement to clear the hdq_irqstatus flags in hdq_read_byte().
> 
> If the hdq reading process is scheduled slowly or interrupts are disabled
> for a while the hardware read activity might already be finished on entry
> of hdq_read_byte(). And hdq_isr() already has set the hdq_irqstatus to
> 0x6 (can be seen in debug mode) denoting that both, the TXCOMPLETE
> and RXCOMPLETE interrupts occurred in parallel.
> 
> This means there is no need to wait and the hdq_read_byte() can just read
> the byte from the hdq controller.
> 
> By resetting hdq_irqstatus to 0 the read process is forced to be always
> waiting again (because the if statement always succeeds) but the hardware
> will not issue another RXCOMPLETE interrupt. This results in a false
> timeout.
> 
> After such a situation the hdq bus hangs.
> 
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>

Needs a cc:stable.

I'll assume Greg will be handling this patch.