From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754241AbcGVNwo (ORCPT ); Fri, 22 Jul 2016 09:52:44 -0400 Received: from mail-wm0-f52.google.com ([74.125.82.52]:37681 "EHLO mail-wm0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753995AbcGVNwm (ORCPT ); Fri, 22 Jul 2016 09:52:42 -0400 Date: Fri, 22 Jul 2016 14:53:50 +0100 From: Lee Jones To: Andy Shevchenko Cc: Andy Shevchenko , "linux-kernel@vger.kernel.org" , Mika Westerberg Subject: Re: [PATCH v1 1/1] mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs Message-ID: <20160722135350.GF14925@dell> References: <1467645894-89868-1-git-send-email-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.6.2 (2016-07-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 22 Jul 2016, Andy Shevchenko wrote: > On Mon, Jul 4, 2016 at 6:24 PM, Andy Shevchenko > wrote: > > From: Mika Westerberg > > > > Intel Kaby Lake PCH-H has the same LPSS than Intel Sunrisepoint. Add the new > > IDs to the list of supported devices. > > I'm sorry for an empty ping, but we would like to clarify what is the > plan for this patch. Will it be material for v4.8-rc1? I don't tend to accept !bug-fix patches post -rc6, and the merge-window is due to open imminently. So it's due for v4.9. > > Signed-off-by: Mika Westerberg > > --- > > drivers/mfd/intel-lpss-pci.c | 23 +++++++++++++++++++++++ > > 1 file changed, 23 insertions(+) > > > > diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c > > index 1d79a3c..d19569a 100644 > > --- a/drivers/mfd/intel-lpss-pci.c > > +++ b/drivers/mfd/intel-lpss-pci.c > > @@ -111,6 +111,19 @@ static const struct intel_lpss_platform_info bxt_i2c_info = { > > .properties = bxt_i2c_properties, > > }; > > > > +static const struct intel_lpss_platform_info kbl_info = { > > + .clk_rate = 120000000, > > +}; > > + > > +static const struct intel_lpss_platform_info kbl_uart_info = { > > + .clk_rate = 120000000, > > + .clk_con_id = "baudclk", > > +}; > > + > > +static const struct intel_lpss_platform_info kbl_i2c_info = { > > + .clk_rate = 133000000, > > +}; > > + > > static const struct pci_device_id intel_lpss_pci_ids[] = { > > /* BXT A-Step */ > > { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, > > @@ -181,6 +194,16 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { > > { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info }, > > { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info }, > > { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info }, > > + /* KBL-H */ > > + { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&kbl_uart_info }, > > + { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&kbl_uart_info }, > > + { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&kbl_info }, > > + { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&kbl_info }, > > + { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&kbl_i2c_info }, > > + { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&kbl_i2c_info }, > > + { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&kbl_i2c_info }, > > + { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&kbl_i2c_info }, > > + { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&kbl_uart_info }, > > { } > > }; > > MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids); > > > > > -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog