From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752951AbcHACTx (ORCPT ); Sun, 31 Jul 2016 22:19:53 -0400 Received: from mail-pa0-f67.google.com ([209.85.220.67]:34467 "EHLO mail-pa0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750997AbcHACTp (ORCPT ); Sun, 31 Jul 2016 22:19:45 -0400 Date: Mon, 1 Aug 2016 09:58:57 +0800 From: Peter Chen To: Matthias Kaehlcke Cc: Peter Chen , gregkh@linuxfoundation.org, stern@rowland.harvard.edu, ulf.hansson@linaro.org, broonie@kernel.org, sre@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, dbaryshkov@gmail.com, dwmw2@infradead.org, k.kozlowski@samsung.com, linux-arm-kernel@lists.infradead.org, p.zabel@pengutronix.de, devicetree@vger.kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, linux-usb@vger.kernel.org, arnd@arndb.de, s.hauer@pengutronix.de, mail@maciej.szmigiero.name, troy.kisky@boundarydevices.com, festevam@gmail.com, oscar@naiandei.net, stephen.boyd@linaro.org, linux-pm@vger.kernel.org, stillcompiling@gmail.com, linux-kernel@vger.kernel.org Subject: Re: [v3,2/6] power: add power sequence library Message-ID: <20160801015857.GA15388@shlinux2> References: <1469007629-31757-3-git-send-email-peter.chen@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 29, 2016 at 01:06:48PM -0700, Matthias Kaehlcke wrote: > Hi Peter, > > Thanks for your work on this, a few comments inline > > > On 07/20/2016 02:40 AM, Peter Chen wrote: > > >... > > > >+static int pwrseq_generic_on(struct device_node *np, struct pwrseq *pwrseq) > >+{ > > > >... > > > >+ if (gpiod_reset) { > >+ u32 duration_us = 50; > >+ > >+ of_property_read_u32(np, "reset-duration-us", > >+ &duration_us); > >+ usleep_range(duration_us, duration_us + 10); > The end of the range could allow for more margin. Also consider busy > looping for very short delays as in > http://lxr.free-electrons.com/source/drivers/regulator/core.c#L2062 Thanks, I will change it. > >... > > > >+static int pwrseq_generic_get(struct device_node *np, struct pwrseq *pwrseq) > >+{ > >+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq); > >+ enum of_gpio_flags flags; > >+ int reset_gpio, ret = 0; > >+ > >+ pwrseq_gen->clk = of_clk_get_by_name(np, NULL); > This only gets the first of potentially multiple clocks, is that intended? Since it is ran before the driver's probe, we thought one clock for power sequence is enough. If your case really needs several clocks to be enabled before your device can be found by bus, let me know. I will add support for it. But what are the name for clocks, since it is generic library? "gen1, gen2 and gen3"? -- Best Regards, Peter Chento