From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Icenowy Zheng <icenowy@aosc.xyz>
Cc: Russell King <linux@armlinux.org.uk>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>,
Hans de Goede <hdegoede@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33
Date: Tue, 23 Aug 2016 08:47:55 +0200 [thread overview]
Message-ID: <20160823064755.GA2598@lukather> (raw)
In-Reply-To: <20160823055826.20591-1-icenowy@aosc.xyz>
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Hi,
On Tue, Aug 23, 2016 at 01:58:25PM +0800, Icenowy Zheng wrote:
> PG8, PG9 is said to be the CTS/RTS pins for UART1 according to the A23/33
> datasheets. However, the function is wrongly named "uart2" in the pinctrl
> driver. This patch fixes this by modifying them to be named "uart1".
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
This looks good, but could you send it to stable?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next parent reply other threads:[~2016-08-23 6:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20160823055826.20591-1-icenowy@aosc.xyz>
2016-08-23 6:47 ` Maxime Ripard [this message]
2016-08-23 9:27 ` [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33 Linus Walleij
2016-08-23 9:54 ` Maxime Ripard
2016-08-23 10:29 ` Linus Walleij
[not found] ` <20160823055826.20591-2-icenowy@aosc.xyz>
2016-08-23 11:42 ` [PATCH 2/2] ARM: dts: sun8i: Add extra UART pinmux settings for A23/33 Maxime Ripard
[not found] ` <69271471960265@web26h.yandex.ru>
2016-08-26 20:18 ` Maxime Ripard
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