From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757283AbcHXXNG (ORCPT ); Wed, 24 Aug 2016 19:13:06 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:43267 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754275AbcHXXND (ORCPT ); Wed, 24 Aug 2016 19:13:03 -0400 Date: Wed, 24 Aug 2016 16:05:28 -0700 From: Stephen Boyd To: Purna Chandra Mandal Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Ralf Baechle , Michael Turquette , linux-clk@vger.kernel.org Subject: Re: [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA. Message-ID: <20160824230528.GH19826@codeaurora.org> References: <1463461560-9629-1-git-send-email-purna.mandal@microchip.com> <1463461560-9629-2-git-send-email-purna.mandal@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1463461560-9629-2-git-send-email-purna.mandal@microchip.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/17, Purna Chandra Mandal wrote: > Optional SOSC is an external fixed clock running at 32768HZ. > So Initialize SOSC rate as per PIC32MZDA datasheet. > > Signed-off-by: Purna Chandra Mandal > > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project