From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933467AbcHaI0G (ORCPT ); Wed, 31 Aug 2016 04:26:06 -0400 Received: from mail-pa0-f66.google.com ([209.85.220.66]:35359 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933371AbcHaI0B (ORCPT ); Wed, 31 Aug 2016 04:26:01 -0400 From: Milo Kim To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Linus Walleij , Thierry Reding Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Milo Kim Subject: [PATCH v2 1/4] ARM: dts: sun8i: Add PWM pin in H3 Date: Wed, 31 Aug 2016 17:25:17 +0900 Message-Id: <20160831082520.25962-2-woogyom.kim@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160831082520.25962-1-woogyom.kim@gmail.com> References: <20160831082520.25962-1-woogyom.kim@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org H3 PA5 pin is assigned for single PWM channel. Cc: Rob Herring Cc: Maxime Ripard Cc: Chen-Yu Tsai Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Milo Kim --- arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index fdf9fdb..05d0c4b 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -360,6 +360,13 @@ allwinner,pull = ; }; + pwm0_pin_a: pwm0@0 { + allwinner,pins = "PA5"; + allwinner,function = "pwm0"; + allwinner,drive = ; + allwinner,pull = ; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PA4", "PA5"; allwinner,function = "uart0"; -- 2.9.3